MOS type semiconductor memory device having a word line resettin

Static information storage and retrieval – Powering – Conservation of power

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Details

36518906, 365203, 365204, G11C 700

Patent

active

051133741

ABSTRACT:
A MOS type semiconductor memory device provided with an improved word line reset circuit. The memory device includes word lines and digit lines intersecting with the word lines; a precharge circuit for precharging the digit lines during a precharge period; a row decorder provided for selecting one of the word lines; and the word line reset circuit which includes a word line reset circuit connected between a reference potential and the word lines, respectively, with the word line resetting circuit being adapted to provide a current path between the reference potential and a corresponding one of the word lines during the precharge period and a current path between the reference potential and each of the non-selected word lines during the active period; and a control circuit for setting a resistance of the current path of the word line resetting circuit at a relatively small value during the active period and to a relatively large value during the precharge period.

REFERENCES:
patent: 4409679 (1983-10-01), Kurafuji et al.

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