MOS type dynamic random access memory

Details MOS type dynamic random access memory MOS type dynamic random access memory

1990-05-24

1991-09-17

Hille, Rolf

Fishing, trapping, and vermin destroying

357 51, 357 41, 437 52, H01L 2968, H01L 2702, H01L 2170

Patent

active

050499572

ABSTRACT:
In a semiconductor memory device, a storage node electrode having a cavity is provided such that the inner surface of a storage node electrode is used as a capacitor electrode. In a DRAM fabricating method, a storage node electrode having a cavity is formed by laminating a first conductor layer, an insulating film and a second conductor layer, which in turn are patterned into a desired shape, depositing a third conductor layer on the three-layer pattern, performing anisotropic etching so as to cause the third conductor layer to remain only on the side walls of the pattern to thereby form a box-shaped conductor, forming an opening in a part of the box-shaped conductor, removing the insulating film by an etching to thereby form a cavity.

REFERENCES:
patent: 4700457 (1987-10-01), Matsukawa
T. Kisu et al., "A Novel Storage Capacitance Enlargement Structure Using a Double-Staked Storage Node in STC DRAM Cell", Extended Abstracts of the 20th (1988 International) Conference on Solid State Devices and Materials, 1988, pp. 581-584.
W. Wakamiya et al., "Novel Stacked Capacitor Cell for 64Mb DRAM", 1989 Symposium on VLSI Technology, May 1989, pp. 69-70.

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