MOS transistor structure with easy access to all nodes

Details MOS transistor structure with easy access to all nodes MOS transistor structure with easy access to all nodes

2008-04-08

2008-04-08

Tran, Minh-Loan T (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

C257S208000, C257S211000, C257SE27108

Reexamination Certificate

active

07355217

ABSTRACT:
A transistor device structured such that the bulk, gate, drain, and source are all accessible from all four edges of the device is provided. The transistor is created with a four-metal CMOS process. A bulk connection can be made with Metal1, which is all around the device. A gate connection can be made with Metal2, which is all around the device. Additionally, a drain/source connection can be made with Metal3, which is all around the device. A source/drain connection can be made with Metal4, which is all around the device. The transistor structure may be used to create an array of transistors for a high power output stage, with the transistors arranged in a checkerboard pattern. The connections of each transistor are automatic by abutting edges of the transistors.

REFERENCES:
patent: 4636825 (1987-01-01), Baynes
patent: 5447876 (1995-09-01), Moyer et al.
patent: 2003/0054614 (2003-03-01), Trivedi et al.

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