MOS transistor circuit and method for biasing a voltage generato

Details MOS transistor circuit and method for biasing a voltage generato MOS transistor circuit and method for biasing a voltage generato

1997-12-12

1999-09-28

Sterrett, Jeffrey

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

G05F 316

Patent

active

059594446

ABSTRACT:
A voltage generator circuit includes a first feedback transistor coupled between a supply voltage source and a first bias node, and a gate coupled to an output node. A first bias MOS transistor of a first conductivity type has a first signal terminal and a back-bias terminal coupled to the first bias node, and a gate and second signal terminal coupled to a tracking node. A second bias MOS transistor of a second conductivity type has a gate and a first signal terminal coupled to the tracking node, and a second signal terminal coupled to a second bias node. A second feedback transistor is coupled between the second bias node and a reference voltage source, and has a gate coupled to the output node. A first drive MOS transistor has a first signal terminal coupled to the supply voltage source, a gate coupled to the first bias node, and a second signal terminal coupled to the output node. A second drive MOS transistor has a first signal terminal coupled to the output node, a second signal terminal coupled to the reference voltage source, and a gate coupled to the second bias node.

REFERENCES:
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patent: 5369354 (1994-11-01), Mori
patent: 5717324 (1998-02-01), Tobita
patent: 5757225 (1998-05-01), Tobita

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