MOS source follower circuit

Electrical transmission or interconnection systems – Personnel safety or limit control features – Interlock

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307DIG1, 330288, H03K 326, H03F 316

Patent

active

040681408

ABSTRACT:
A source follower circuit which exhibits essentially zero input to output voltage drop and very low capacitive loading on the input. A current mirror arrangement is used. The input is connected to the gate of a depletion mode transistor which is connected in series with an enhancement mode device. The gate of the enhancement device is biased by a series circuit having a depletion device with gate shorted to source and an enhancement device with gate shorted to drain.

REFERENCES:
patent: 3601712 (1971-08-01), Elazar
patent: 3700981 (1972-10-01), Masuhara et al.
patent: 3872390 (1975-03-01), Nash
Proceeding of the IEEE, Jan. 1966, p. 66.

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