MOS semiconductor device with an inverted U-shaped gate

Details MOS semiconductor device with an inverted U-shaped gate MOS semiconductor device with an inverted U-shaped gate

1990-02-06

1991-06-04

James, Andrew J.

Fishing, trapping, and vermin destroying

357 41, 357 59, 437203, H01L 2910, H01L 2978, H01L 2702, H01L 2904

Patent

active

050218468

ABSTRACT:
Provided is a metal oxide semiconductor with an inverted U-shaped recess formed therein, the recess having two relatively deep outside channels and an interconnecting relatively shallow channel. The recess is filled with polycrystalline silicon gate material, and when biased, a conductive region is formed alongside an outside channel. Also provided also is a method of forming such an inverted U-shaped recess in a metal oxide semiconductor.

REFERENCES:
patent: 4697201 (1987-09-01), Mihara
patent: 4830978 (1989-05-01), Teng et al.
patent: 4881105 (1989-11-01), Davari et al.
"V-MOS Makes Gains in Power Devices at General Electric, in Frequency at Tectronix", Electronics, vol. 51, No. 23, Nov. 9, 78, pp. 40-41.
Scharf, B. W., "A MOS-Controlled Triac Device", IEEE International and Solid State Circuits Conference, Feb. 1978, pp. 222-223.

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