MOS semiconductor device having high-capacity stacked capacitor

Details MOS semiconductor device having high-capacity stacked capacitor MOS semiconductor device having high-capacity stacked capacitor

1990-09-24

1991-11-26

Hille, Rolf

Fishing, trapping, and vermin destroying

357 51, 357 41, 437 52, H01L 2968, H01L 2702, H01L 2170

Patent

active

050686984

ABSTRACT:
A semiconductor memory device having a plurality of memory cells each comprising an insulated gate MOS transistor and a stacked capacitor. The stacked capacitor having a lower electrode and an oppositely disposed upper electrode whereby the lower electrode has an insulating film in its interior, thereby making it possible to increase the capacitance of the stacked capacitor without increasing the surface area of the electrode.

REFERENCES:
"Session XVII: Megabit Drams", FAM 17.7: A lMb Dram with 3-Dimensional Stacked Capacitor Cells, Takemae, et al., 1985, IEEE International Solid State Circuits Conference, pp. 250-251, (1985).

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