1978-09-18
1980-12-30
Wojciechowicz, Edward J.
357 58, 357 89, H01L 2978
Patent
active
042426910
ABSTRACT:
The disclosed MOS transistor includes a channel region formed of a lightly doped semiconductor layer disposed in a surface portion of a heavily doped semiconductor layer subsequently disposed on a lightly doped semiconductor substrate. The channel region may be of the identical or opposite conductivity type to the heavily doped semiconductor layer that has the same type conductivity as the substrate. Also the channel region may be of an intrinsic semiconductive material. A source and a drain region may be disposed in the lightly or highly doped layer. Alternatively the source and drain regions may reach the substrate.
REFERENCES:
patent: 3696276 (1972-10-01), Boland
patent: 3823352 (1974-07-01), Pruniaux et al.
Kawazu Satoru
Kotani Norihiko
Mitsubishi Denki & Kabushiki Kaisha
Wojciechowicz Edward J.
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