MOS output buffer with reduced supply line disturbance

Details MOS output buffer with reduced supply line disturbance MOS output buffer with reduced supply line disturbance

1990-03-26

1990-09-25

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307448, 307451, 307263, 307270, 307572, H03K 1716, H03K 19017, H03K 512

Patent

active

049595610

ABSTRACT:
An output buffer with reduced supply line disturbance is provided for use in high performance microprocessor circuits. The output buffer uses a resistor and transistor as a sensing circuit, in parallel with an output driver transistor, thereby providing a negative feedback path into the control circuitry for the output driver. The sensing circuit detects the strength of the output driver transistor, by monitoring the amount of capacitance on the output node when the output buffer is driving the output signal to a logic high or logic low state, and rapidly produces a control voltage. The current flowing through the driver transistor and the sensor transistor causes a voltage drop across the resistor, which is fedback into the control circuitry. The control voltage is fed back into the output buffer control circuitry, thereby facilitating the reduction of the current drive capabilities of the driver and sensor transistors. Thus, the control circuitry reduces the change in current flow (di/dt) attributable to the operation of the driver and sensor transistors during the output buffer logic state transition.

REFERENCES:
patent: 4758743 (1988-07-01), Dehganpour et al.
patent: 4818901 (1989-04-01), Young et al.

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