MOS output buffer circuit with feedback

Details MOS output buffer circuit with feedback MOS output buffer circuit with feedback

1977-02-23

1978-06-20

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307209, 307270, 307DIG1, 330269, H03K 508, H03K 1760, H03F 316, H03F 326

Patent

active

040963985

ABSTRACT:
A PMOS output buffer circuit permits interfacing directly with TTL, CMOS, and NMOS. A feedback circuit incorporated into the buffer acts to limit the drive current for negative potential output excursions. The feedback circuit is sensitive to device parameters that vary with processing so that the output characteristics can be set independently of process variables.

REFERENCES:
patent: 3648071 (1972-03-01), Mrazek
patent: 3700981 (1972-10-01), Masuhara
patent: 3736522 (1973-05-01), Padgett
patent: 3980898 (1976-09-01), Priel
patent: 4019068 (1977-04-01), Bormann
patent: 4032800 (1977-06-01), Droscher et al.
patent: 4037114 (1977-07-01), Stewart et al.
Gardner, "FET Off-Chip Driver Clamping", IBM Tech. Discl. Bull., vol. 16, No. 1, pp. 275-276, 6/1973.

Affiliated with

Also associated with

Rating

MOS output buffer circuit with feedback does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with MOS output buffer circuit with feedback, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS output buffer circuit with feedback will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1136164