MOS Latch circuit

Details MOS Latch circuit MOS Latch circuit

1979-05-23

1982-06-01

Chatmon, Jr., Saxfield

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307453, 307481, 307291, H03K 326, H03K 1728, H03K 518, H03K 3353

Patent

active

043330207

ABSTRACT:
A MOS latch circuit is provided which has a fast response and is sensitive to low level input clock signals. The latch circuit has two load devices which are connected to a pair of cross-coupled transistors. A controllable current source is used to control the current flow through the cross-coupled pair of transistors. A first coupling transistor is connected between the input of the cross-coupled pair of transistors and a second controllable current source. A second coupling transistor is connected between a second input of the cross-coupled pair of transistors and to the second controllable current source. The first and second coupling transistors are enabled by input data signals to the latch circuit while the first and second controllable current sources are controlled by clock signals.

REFERENCES:
patent: 3614476 (1971-10-01), Teranishi
patent: 3748498 (1973-07-01), Hoffmann
patent: 3935475 (1976-01-01), Margolies
patent: 3959781 (1976-05-01), Mehta et al.
patent: 4112296 (1978-09-01), Heimbigner et al.
patent: 4132904 (1979-01-01), Harari
patent: 4146802 (1979-03-01), Moench

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