MOS Integrated test circuit using field effect transistors

Details MOS Integrated test circuit using field effect transistors MOS Integrated test circuit using field effect transistors

1980-02-01

1982-07-13

Strecker, Gerard R.

Electricity: measuring and testing

Plural, automatically sequential tests

307581, G01R 1512

Patent

active

043397107

ABSTRACT:
An MOS integrated circuit arrangement with field-effect transistors includes a circuit arrangement for rapidly testing various blocks of the circuit. This circuit arrangement includes three transistor-switch groups; a first group for testing an input block, a second group for connecting and disconnecting the input block and an output block so that the blocks may be tested in combination, and a third group for testing the output block. The disclosed circuit provides a single and yet effective testing arrangement.

REFERENCES:
patent: 3509375 (1970-04-01), Gormley
patent: 4053833 (1977-10-01), Malmberg et al.
Abilevitz et al., "Circuit for Facilitating the Testing of Semiconductor Chips on a Module", IBM Tech Disc. Bull., vol. 22, No. 2, 8/1979, pp. 1018-1021.

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