MOS Integrated circuit having refractory metal or metal silicide

Details MOS Integrated circuit having refractory metal or metal silicide MOS Integrated circuit having refractory metal or metal silicide

1980-10-27

1983-07-05

James, Andrew J.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

357 59, 357 67, 357 71, 29571, 427 88, H01L 2702, H01L 2348, H01L 2946

Patent

active

043921507

ABSTRACT:
A partial silicide layer under a polycrystalline silicon (polysi) first level interconnect reduces the sheet resistance of the first level interconnect. The polysi insulates the silicide from possibly reactive materials and gases. Since the silicide is not deposited over contacts between the polysi and the substrate, conventional polysi/silicon ohmic contacts can be made.

REFERENCES:
patent: 3381182 (1968-04-01), Thornton
patent: 3537174 (1970-11-01), May
patent: 4291322 (1981-09-01), Clemens et al.
Crowder et al., 1 .mu.m MOSFET VLSI Technology-Part VII . . . , IEEE J of SSC, vol. SC-14, No. 2, Apr. 1979, pp. 291-293.
S. P. Murarka, Refractory Silicides for Low Resistivity Gates and Interconnects, 1979 IEEE, pp. 454-457.

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