MOS input buffer with hysteresis

Details MOS input buffer with hysteresis MOS input buffer with hysteresis

1976-11-12

1978-01-31

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307270, 307290, 307DIG1, H03K 3295, H03K 3353

Patent

active

040717844

ABSTRACT:
An MOS input buffer circuit includes an input connected to the gate electrode of an enhancement mode input MOSFET. The drain of the input MOSFET is connected to the output of the input buffer circuit. The source of the input MOSFET is connected to the drain of a second depletion mode MOSFET having its source connected to ground and its gate connected to a V.sub.DD voltage conductor. A load circuit is coupled between the V.sub.DD voltage conductor and the output, and consists of an enhancement mode MOSFET and a depletion load MOSFET coupled in series between output and V.sub.DD voltage conductor. A third depletion mode MOSFET has its drain connected to the V.sub.DD voltage conductor, its source connected to the source of the input MOSFET, and its gate connected to the output. The positive gain (or negative slope) portion of the switching characteristic of the input buffer circuit extends substantially all the way between the high and low output levels.

REFERENCES:
patent: 3775693 (1973-11-01), Proebsting
patent: 3873856 (1975-03-01), Gerlach
patent: 4023122 (1977-05-01), Oura

Affiliated with

Also associated with

Rating

MOS input buffer with hysteresis does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with MOS input buffer with hysteresis, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS input buffer with hysteresis will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2078877