MOS-gate-turnoff thyristor

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Combined with field effect transistor

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257110, 257139, 257147, 257155, 257175, H01L 2974, H01L 2910, H01L 2702, H01L 29747

Patent

active

053048210

ABSTRACT:
An N.sup.+ buffer layer (2) and an N.sup.- layer (3) are provided on a P.sup.+ silicon substrate (1) in this order. On an upper portion of the N.sup.- layer (3), a P.sup.- layer (4b) is selectively formed, and on the P.sup.- layer (4b), a P.sup.+ layer (4a) is provided. On part of an top surface of the P.sup.+ layer (4a), a plurality of N.sup.+ layers (5a) are provided, and a trench (13) is formed extending through each of the N.sup.+ layers (5a) and P.sup.+ layer (4a) downwards to the P.sup.- layer (4b). In the P.sup.- layer (4b), an N.sup.+ floating layer (5b) is provided covering the bottom face of each trench (13). In the inner hollow of the trench (13), a gate electrode (8a) is provided through a gate oxidation film (7a), while an emitter electrode (9a) is provided extending between the top surfaces of the adjacent N.sup.+ layers (5a) with the surface of the P.sup.+ layer (4a) interposed so as to electrically short circuit them. A collector electrode (10) is provided on a lower major surface of the P.sup.+ substrate (1). When a higher potential than that of the emitter electrode (9a) is applied to the gate electrode (8a) with forward bias being applied between the electrodes (9a) and (10) so that the collector electrode (10) may be higher in potential than the emitter electrode (9a), the channel region (6a) turns to the N-type, and electrons move from the N.sup.+ layers (5a) through 26e channels (6a) to the N.sup.+ floating layers (5b).

REFERENCES:
patent: 4630092 (1986-12-01), Bhagat
patent: 4717940 (1988-01-01), Shinohe et al.
patent: 4799095 (1989-01-01), Baliga
patent: 4872044 (1989-10-01), Nishizawa et al.
patent: 4994871 (1991-02-01), Chang et al.
patent: 5202750 (1993-04-01), Gough
IEEE Electron Device Letters, vol. 11, No. 2, Feb. 1990, pp. 75-77, B. J. Baliga: "The MOS-Gated Emitter Switched Thyristor".
International Electron Devices Meeting, Technical Digest, Dec. 1987, pp. 674-677, H. R. Chang et al., "Insulated Gate Bipolar Transistor (IGBT) with a Trench Gate Structure".

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