MOS FET drive circuit providing protection against transient vol

Details MOS FET drive circuit providing protection against transient vol MOS FET drive circuit providing protection against transient vol

1987-09-11

1989-04-25

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307451, 307558, 307542, H03K 1708, H03K 1716, H03K 17284, H03K 3013

Patent

active

048251020

ABSTRACT:
A drive circuit suitable for producing a high voltage drive output signal has an output stage formed of a P-channel MOS FET (4) and an N-channel MOS FET (5) connected for push-pull operation. The circuit is configured such that even with a supply voltage applied to the output stage which is higher than the ON-state withstand voltage of the MOS FETs, this value of voltage is prevented from being applied to a MOS FET which is in the ON stage, i.e. by providing voltage-dropping resistors (R.sub.1, R.sub.2) connected between the drain electrodes of the MOS FETs (4, 5) or utilizing a circuit which prevents each MOS FET from entering the ON state until after the other MOS FET has entered the OFF state.

REFERENCES:
patent: 3651340 (1972-03-01), Cliff
patent: 4103190 (1978-07-01), Beutler
patent: 4164842 (1979-08-01), Ebihara
patent: 4233525 (1980-11-01), Takahashi et al.
patent: 4467224 (1984-08-01), Maddox
patent: 4525635 (1985-06-01), Gillberg
patent: 4540904 (1985-09-01), Ennis et al.
patent: 4620310 (1986-10-01), Lvovsky
Electronic Design, 18th Apr. 1985, pp. 52, 53; D. Bursky: "CMOS ICs Handle High-Voltage Needs of RS-232 Interface".

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