MOS Dynamic RAM cell and method of fabrication

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

Patent

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Details

427 79, H01L 2978, H01L 2702, B05D 512

Patent

active

044092598

ABSTRACT:
A high density CMOS dynamic RAM cell comprising a transistor and capacitance means formed in an n-well is disclosed. The capacitance means includes a polysilicon plate member disposed above a p-type region formed in the n-well. A buried contact, extending from the plate member, pierces the p-type region and contacts the well. In addition to the capacitance associated with the plate member, p-type region and well, capacitance is obtained between the side walls of the n-type regions and p-type regions.

REFERENCES:
patent: 4158238 (1979-06-01), Erb

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