MOS Dynamic memory in a diffusion current limited semiconductor

Details MOS Dynamic memory in a diffusion current limited semiconductor MOS Dynamic memory in a diffusion current limited semiconductor

1979-01-22

1980-08-05

Wojciechowicz, Edward J.

357 23, 357 41, 357 51, 357 89, 357 90, H01L 2702

Patent

active

042164893

ABSTRACT:
In a dynamic MOS (Metal Oxide Semiconductor) random access memory, reverse bias leakage currents which deplete stored charges are reduced by minimizing minority carrier generation-type currents. By so minimizing these currents, the leakage currents become dominated by minority carrier diffusion currents. The memory is ideally formed in an upper semiconductor layer (14) of a layered structure (11). The semiconductor layer (14) is grown epitaxially with a relatively low dopant concentration on a semiconductor substrate (12) with a dopant concentration of the same conductivity type and about three orders of magnitude greater than that of the epitaxially grown layer. The epitaxially grown structure is advantageously suited for the memory circuits in that it may be formed with very low leakage currents. The material further offers by its layered structure a basis for optimizing dynamic memory device characteristics.

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