Patent
1981-05-12
1983-08-09
Clawson, Jr., Joseph E.
357 41, 357 59, H01L 2702
Patent
active
043982077
ABSTRACT:
An MOS integrated circuit digital-to-analog converter employing a plurality of generally parallel resistance strings. Decoding means and switching means provide an analog output from the resistance strings, this output passes through only two switches. The resistance strings may be closely fabricated on a substrate, thereby reducing the effects of processing variations. A unique layout for the converter array minimizes the effects of masking misalignments.
REFERENCES:
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patent: 3811076 (1974-05-01), Smith
patent: 3812478 (1974-05-01), Tomisawa et al.
patent: 4021789 (1977-05-01), Furman et al.
patent: 4131809 (1978-12-01), Baars
patent: 4141023 (1979-02-01), Yamada
Hoff, Jr. Marcian E.
Huggins John M.
Clawson Jr. Joseph E.
Intel Corporation
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