MOS detector or sensing circuit

Details MOS detector or sensing circuit MOS detector or sensing circuit

1976-12-27

1978-04-04

Anagnos, Larry N.

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307238, 307251, 307DIG1, 307DIG3, 307DIG4, 365103, 365203, H03K 518, H03K 1760, G11C 1308, G11C 1704

Patent

active

040829669

ABSTRACT:
A detector circuit for MOS/LSI integrated circuit devices comprises a series transistor which has a sense clock applied to its gate and a gated capacitor connected between the gate and a sense node. The sense node and an input node may be precharged to a level at or near the supply. During the sense clock, the input and sense nodes are shunted together by the series transistor. If at the logic level of the supply, the gated capacitor is off and does not affect the circuit; if the input node decays toward the other logic level, the gated capacitor is on and the trailing edge of the sense clock causes the sense node to be switched to a full logic level.

REFERENCES:
patent: 3662188 (1972-05-01), Williams
patent: 3808458 (1974-04-01), Mundy et al.
patent: 3983414 (1976-09-01), Stafford et al.
Cassidy et al., "Low-Input Impedance FET (ORBI-FET) Sense Amplifier," IBM Tech. Discl. Bull.; vol. 17, No. 1, pp. 23-24; 6/1974.

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