MOS computer employing a plurality of separate chips

Details MOS computer employing a plurality of separate chips MOS computer employing a plurality of separate chips

1974-12-31

1977-03-01

Springborn, Harvey E.

Communications: electrical

Digital comparator systems

G06F 1300

Patent

active

040104494

ABSTRACT:
A metal-oxide-semiconductor (MOS) computer wherein the bidirectional data bus lines which communicate with the central processing unit (CPU) are also utilized to convey CPU status information to a status latch, thereby eliminating pin connections otherwise required to convey status information from the CPU. A special jump instruction of all zeroes or ones is used eliminating components associated with the prior art application of such instructions to the CPU.

REFERENCES:
patent: 3757306 (1973-09-01), Boone
patent: 3821715 (1974-06-01), Hoff et al.
patent: 3855577 (1974-12-01), Vandierendonck

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