MOS-capacitor for integrated circuits

Metal treatment – Stock – Ferrous

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357 14, 357 23, 357 48, 357 54, 357 91, 148 15, 148175, H01L 2704, H01L 2994

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040018695

ABSTRACT:
In an integrated circuit formed in a P-type silicon crystal body having an N-type epitaxial layer grown thereon, and having at least one bipolar transistor and at least one ion implanted resistor formed therein, a MOS type capacitor is formed requiring no additional processing steps beyond those normally required to form the resistor and the transistor. The capacitor comprises a first electrode of P-type material, a thin layer of silicon oxide grown simultaneously with the oxide through which the resistor is implanted, and a metal electrode over the oxide dielectric layer. The capacitor of this invention exhibits a relatively high capacitance per unit area of integrated circuit real estate and may be manufactured using only process steps that are required to form bipolar transistors and ion implanted resistors.

REFERENCES:
patent: 3402332 (1968-09-01), Thire
patent: 3654498 (1972-04-01), Chapron
patent: 3727151 (1973-04-01), Koehler
patent: 3860836 (1975-01-01), Pedersen
patent: 3864817 (1975-02-01), Lapham, Jr. et al.
patent: 3892596 (1975-07-01), Bjorklund et al.
patent: 3902926 (1975-09-01), Perloff et al.
Gay et al, "Capacitors for Monolithic Circuits," SCP and Solid State Technology, Apr. 1966, pp. 24-27.

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