Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1990-09-14
1993-06-08
Zazworsky, John
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307355, 307571, H03K 1921
Patent
active
052182460
ABSTRACT:
This invention relates to the MOS analog XOR amplifier for performing the digital XOR function. The analog XOR provided comprises a constant current source; a first MOS switch having its source terminal connected to said constant current source, its gate terminal connected to the first input signal of said analog XOR amplifier; a first MOS differential pair having two input MOS transistors, the source terminals of said input MOS transistors being commonly connected to the drain terminal of said first MOS switch, one gate terminal of said input MOS transistors being connected to the second input signal of said analog XOR amplifier whilst the other gate terminal of said input MOS transistors being connected to the complementary signal of second input signal to said analog XOR amplifier; a second MOS switch having its source terminal connected to the source terminal of said first MOS switch, its gate terminal connected to complementary signal of said first input signal of said analog XOR amplifier; and a second MOS differential pair having two input MOS transistors, the source terminals of said input MOS transistors being commonly connected to the drain terminal of said second MOS switch, one gate terminal of said input MOS transistors being connected to the second input signal of said analog XOR amplifier whilst the other gate terminal of said input MOS transistors being connected to the complementary signal of the second input signal to said analog XOR amplifier. The analog XOR provided has advantage of high speed, low noise and easy implementation.
REFERENCES:
patent: 3355598 (1967-11-01), Tuska
patent: 3681614 (1972-08-01), Kroos
patent: 4041326 (1977-08-01), Robinson
patent: 4176287 (1979-11-01), Remedi
patent: 4883987 (1989-11-01), Fattaruso
David C. Wyland, "Cache Tag RAM Chips Simplify Cache Memory Design," pp. 8-44 through 8-52, in Application Note AN-07 by Integrated . . . , Santa Clara, CA.
Lee Sheau-Jiung
Yang Gene
Acer Incorporated
Kaslow Ken M.
Zazworsky John
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