MOS analog multiplier

Details MOS analog multiplier MOS analog multiplier

1974-09-12

1976-05-11

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307221, 307179, 307303, 307304, 330 35, H03B 1700

Patent

active

039566439

ABSTRACT:
A four quadrant multiplier in which a semiconductor chip has a pair of MOSFET differential amplifiers formed with MOSFET current sources for both amplifiers. Currents through the differential amplifiers are modulated 180.degree. out of phase in response to first multiplier input voltages. Currents through one FET of each said amplifier and a second FET of each said amplifier are modulated in response to second multiplier input voltages 180.degree. out of phase.
Active MOSFETs form a load connected to the drains of the first FET of both amplifiers while other active MOSFETs form a load connected to the drain of the second FET of both amplifiers to produce a product voltage across at least one of the load FETs.

REFERENCES:
patent: 3614411 (1971-10-01), Henderson
patent: 3753009 (1973-08-01), Clapper
patent: 3870966 (1975-03-01), Dingwall

Affiliated with

Also associated with

Rating

MOS analog multiplier does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with MOS analog multiplier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS analog multiplier will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1305466