Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated...
Reexamination Certificate
1999-02-26
2002-02-26
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
C257S342000, C257S479000, C257S331000, C257S155000, C438S179000
Reexamination Certificate
active
06351018
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates in general to semiconductor technology, and in particular to a semiconductor device with a monolithically integrated trenched gate MOSFET and SCHOTTKY diode, and its method of manufacture.
In today's electronic devices it is common to find the use of multiple power supply ranges. For example, in some applications, central processing units are designed to operate with a different supply voltage at a particular time depending on the computing load. Consequently, dc/dc converters have proliferated in electronics to satisfy the wide ranging power supply needs of the circuitry. Common dc/dc converters utilize high efficiency switches typically implemented by power MOSFETs such as those manufactured by Fairchild Semiconductor. The power switch is controlled to deliver regulated quanta of energy to the load using, for example, a pulse width modulated (PWM) methodology.
Referring to
FIG. 1
, there is shown a simplified circuit schematic for a conventional dc/dc converter. A PWM controller
100
drives the gate terminals of a pair of power MOSFETs Q
1
and Q
2
to regulate the delivery of charge to the load. MOSFET switch Q
2
is used in the circuit as a synchronous rectifier. In order to avoid shoot-through current, both switches must be off simultaneously while one is turning on and the other turning off. During this dead time, the internal diode of each MOSFET switch can conduct current. Unfortunately this diode has relatively high conduction voltage and energy is wasted. To improve the conversion efficiency of the circuit a Schottky diode
102
is often externally added in parallel with the MOSFET (Q
2
) diode. Because it has superior conduction voltage characteristics, Schottky diode
102
effectively replaces the MOSFET diode eliminating the forward biasing of the MOSFET diode.
Implementing the Schottky diode external to the MOSFET switch package was for many years the preferred solution. More recently, some manufacturers have introduced products in which discrete Schottky diodes are co-packaged with discrete power MOSFET devices. There have also been monolithic implementations of power MOSFETs with Schottky diode. Korman et al., for example, disclose in U. S. Pat. No. 5,111,253 a planar vertical double diffused MOSFET (DMOS) device with a Schottky barrier structure. A similar structure is described by Cogan in U.S. Pat. No. 4,811,065 where again a Schottky diode is monolithically integrated on the same silicon substrate as a lateral DMOS device. These devices, however, have been limited to planar power MOSFET technology. The monolithic Schottky diode structures used in these types of devices do not lend themselves well to power MOSFET devices using trench technology.
There is therefore a need for monolithically integrated Schottky diode together with a trenched gate MOSFET device and methods of manufacture thereof.
SUMMARY OF THE INVENTION
The present invention provides methods and structures for monolithic integration of a Schottky diode together with a high performance trenched gate MOSFET. Broadly, this invention intersperses a MOS enhanced Schottky diode structure throughout the trench MOSFET cell array to enhance the performance characteristics of the MOSFET switch. The forward voltage drop is reduced by taking advantage of the low barrier height of the Schottky structure. In addition, this diode will have an inherent reverse recovery speed advantage compared to the normal pn junction of the vertical power MOSFET. The invention uses features of the trench process to optimize the performance of the Schottky diode. In a specific embodiment, the width of the trench is adjusted such that depletion in the drift region of the Schottky is influenced and controlled by the adjacent MOS structure to increase the reverse voltage capability of the Schottky diode.
Accordingly, in one embodiment, the present invention provides a monolithically integrated structure combining a field effect transistor and a Schottky diode on a semiconductor substrate, including: a trench extending into the substrate and forming a gate electrode of the field effect transistor; a pair of doped source regions positioned adjacent to and on opposite sides of the trench and inside a doped body region, the doped source regions forming a source electrode of the field effect transistor and the substrate forming a drain electrode of the field effect transistor; and a Schottky diode having a barrier layer formed on the surface of the substrate and between a pair of adjacent diode trenches extending into the substrate, the pair of adjacent diode trenches being separated by a distance W.
In another embodiment, the present invention provides a monolithically integrated structure combining a field effect transistor and a Schottky diode on a semiconductor substrate, including: first and second trenches extending into the substrate and forming a gate electrode of the field effect transistor; each of the first and second trenches having a pair of doped source regions positioned adjacent to and on opposite sides of the trench and inside a doped body region, the doped source regions forming a source electrode of the field effect transistor and the substrate forming a drain electrode of the field effect transistor; and a Schottky diode having a barrier layer formed on the surface of the substrate between the first and second trenches and disposed between two doped body regions parallel to the longitudinal axis of each trench. A variation of this embodiment increases the width of the first and the second trench at either sides of the barrier layer.
In yet another embodiment, the present invention provides a method of manufacturing a trench field effect transistor and a Schottky diode on a semiconductor substrate, including the steps of: forming a plurality of trenches extending into the substrate, with a first trench being adjacent to a second trench, and the second being adjacent to a third trench; forming a layer of conductive material inside the plurality of trenches, the layer of conductive material being isolated from trench walls by a dielectric layer; forming a doped body region extending into the substrate between the first and the second trenches and not between the second and the third trenches; forming doped source regions inside the doped body region and adjacent to the walls of the first and the second trenches; and forming a conductive anode layer on the surface of the substrate between the second and the third trenches, whereby a field effect transistor is formed with the substrate providing a drain terminal, the doped source regions a source terminal and the conductive layer in the first and the second trenches a gate terminal, and a Schottky diode is formed with the substrate providing a cathode terminal and the conductive anode layer providing an anode terminal.
A better understanding of the nature and advantages of the monolithically integrated trench MOSFET and Schottky diode according to the present invention may be gained with reference to the detailed description below and the accompanying drawings.
REFERENCES:
patent: 4811065 (1989-03-01), Cogan
patent: 4903189 (1990-02-01), Ngo et al.
patent: 4956308 (1990-09-01), Griffin et al.
patent: 5111253 (1992-05-01), Korman et al.
patent: 5365102 (1994-11-01), Mehrota et al.
patent: 5818084 (1998-10-01), Williams et al.
patent: 5929690 (1999-07-01), Williams
patent: 5998833 (1999-12-01), Baliga
patent: 6049108 (2000-04-01), Williams et al.
patent: 6096629 (2000-08-01), Tsai et al.
“The Graded Doped Power UMOSFET,” Mahalingam et al.,Power Semiconductor Research Center Annual Report, pp. 68-71, North Carolina State University, 1968.
“A Low Forward Drop High Voltage Trench MOS Barrier Schottky Rectifier with Linearly Graded Doping Profile,” Mahalingam et al., PRSC Document TR-97-030, Power Semiconductor Research Center, North Carolina State University, 1997.
Anya Igwe U.
Fairchild Semiconductor Corporation
Smith Matthew
Townsend and Townsend / and Crew LLP
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