Monolithically integrated semiconductor arrangement with a cover

Details Monolithically integrated semiconductor arrangement with a cover Monolithically integrated semiconductor arrangement with a cover

1994-06-22

1995-12-26

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Bipolar transistor structure

Including additional component in same, non-isolated structure

257491, 257603, H01L 29772

Patent

active

054790468

ABSTRACT:
The invention relates to a monolithically integrated semiconductor arrangement, where from the first main surface a first zone (p) and a second zone (n.sup.+) are diffused into a substrate (2), which is weakly doped (substrate region n.sup.-) under a first main surface (3) and is more strongly doped (substrate region n.sup.+) under a second main surface (4). An insulating passivation layer is attached to the first main surface (3), on top of which a metallic cover electrode (D) is located, which covers adjacent substrate regions (n.sup.-) and the edge areas of the first zone (p) and the second zone (n.sup.+). In accordance with the invention, at least one additional zone (.nu.) of the same type of conductivity as the associated zone (n.sup.+), but with weaker doping, is diffused in for increasing the break-through voltage, and is connected to the zone (n.sup.+), does not contact the other zone (p) and prevents the zone (n.sup.+) from directly bordering the substrate (n.sup.-) underneath the cover electrode (D).

REFERENCES:
patent: 4074293 (1978-02-01), Kravitz
patent: 4618875 (1986-10-01), Flohrs
patent: 4799100 (1989-01-01), Blanchard et al.
patent: 4801555 (1989-01-01), Holly et al.
patent: 4916494 (1990-04-01), Flohrs et al.
Y. Sugawara et al./Hitachi Research Lab., "Practical Size Limits of High Voltage IC's," Int. Electron Devices Meeting, Dec. 5-7, 1983, Washington, D.C., IEEE, p. 412 & Fig. 1.

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