Monolithic series/parallel led arrays formed on highly...

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Reexamination Certificate

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C257S089000, C257S090000, C257S097000, C257S098000, C257S099000

Reexamination Certificate

active

06547249

ABSTRACT:

BACKGROUND
Conventional light emitting diode (LED) materials, such as GaAs, have allowed the construction of only single junction or multiple parallel junction devices when fabricated monolithically.
FIG. 1A
illustrates a typical multiple parallel junction LED array
10
. Several p-type regions
13
are grown over a common n-type region
18
. N-contact
11
connects to n-type region
18
and several p-contacts
14
connect to p-type regions
13
. The device is fabricating by forming n-type region
18
on a substrate
12
, then forming a continuous p-type layer over the n-type region. The p-type layer is then divided into discrete regions by mechanically sawing or chemically etching trenches
15
between p-type regions
13
.
FIG. 1B
illustrates another multiple parallel junction LED array
16
. Instead of mechanical sawing or chemical etching, p-type regions
13
are electrically isolated from each other by diffusion. The monolithic arrays illustrated in
FIGS. 1A and 1B
are limited to the parallel configuration illustrated in
FIG. 2
because the use of contacts on opposite sides of the device requires one common conductive layer, i.e., n- or p-layer.
SUMMARY
In accordance with the present invention, a series or parallel LED array is formed on an insulating or highly resistive substrate, such that both the p- and n-contacts for the array are on the same side of the array. The individual LEDs are electrically isolated from each other by trenches or by ion implantation. Interconnects deposited on the array connect the contacts of the individual LEDs in the arrays. In some embodiments, the LEDs are III-nitride devices formed on sapphire substrates. In one embodiment, the III-nitride devices are formed on high-resistance SiC or III-nitride substrates. In one embodiment, two LEDs formed on a single substrate are connected in antiparallel to form a monolithic electrostatic discharge protection circuit. In one embodiment, multiple LEDs formed on a single substrate are connected in series. The series array can operate at a higher voltage than a single LED of the same area, thus simplifying power supply design. In one embodiment, multiple LEDs formed on a single substrate are connected in parallel. In this embodiment, multiple p-type regions are formed on a single n-type region, such that the n-type region surrounds each of the p-type regions and interposes the p-type regions. In some embodiments, a layer of phosphor covers a portion of the substrate on which one or more individual LEDs are formed.


REFERENCES:
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patent: 4182025 (1980-01-01), Wickenden
patent: 4827290 (1989-05-01), Yoritomo et al.
patent: 5060027 (1991-10-01), Hart et al.
patent: 5406095 (1995-04-01), Koyama et al.
patent: 5583349 (1996-12-01), Norman et al.
patent: 5869221 (1999-02-01), Ogihara et al.
patent: 5952681 (1999-09-01), Chen
patent: 6054723 (2000-04-01), Tajiri et al.
patent: 6120909 (2000-09-01), Bojarczuk, Jr. et al.

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