Patent
1988-05-02
1989-12-05
James, Andrew J.
357 40, 357 51, 357 55, 73727, H01L 2984, H01L 2996
Patent
active
048856215
ABSTRACT:
A monolithic pressure sensitive silicon integrated circuit is formed by first providing a localized etch-stop layer on one surface of the silicon chip, then growing successive epitaxial layers of opposite conductivity types over this surface. In the upper of the two layers, there is formed a bridge of four piezoresistors overlying the periphery of the etch-stop layer and the conditioning circuitry for amplifying the output of the bridge including both lateral and vertical junction transistors. The back surface of the chip is etched anisotropically to form a cavity that leaves a thin diaphragm underlying the bridge of the four piezoresistors.
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Brown Ronald E.
Hornback Donald L.
Leisure Ronald K.
Stevenson Paul E.
Yoder Douglas J.
Crane Sara W.
Delco Electronics Corporation
James Andrew J.
Wallace Robert J.
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