Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Patent
1993-04-01
2000-04-18
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
257 31, 257661, 257663, 505191, 505239, 505330, 505703, H01L 2906, H01L 310256, H01L 3922, H01L 3300
Patent
active
060518464
ABSTRACT:
A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.
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"Demonstration of Y.sub.1 Ba.sub.2 Cu.sub.3 0.sub.7-.delta. and Complemery Metal-Oxide-Semiconductor Device Fabrication On The Same Sapphire Substrate", M. J. Burns, 320, Applied Physi Letters, 63(1993) 30 Aug., No. 9, Woodbury, NY US.
Barfknecht Andrew T.
Burns Michael J.
Clayton Stanley R.
de la Houssaye Paul R.
Garcia Graham A.
Fendelman Harvey
Kagan Michael A.
Saadat Mahshid
The United States of America as represented by the Secretary of
Whitesell Eric James
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