Monolithic, combo nonvolatile memory allowing byte, page and...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185230, C365S185330

Reexamination Certificate

active

07102929

ABSTRACT:
A novel FLASH-based EEPROM cell, decoder, and layout scheme are disclosed to eliminate the area-consuming divided triple-well in cell array and allows byte-erase and byte-program for high P/E cycles. Furthermore, the process-compatible FLASH cell for EEPROM part can be integrated with FLASH and ROM parts so that a superior combo, monolithic, nonvolatile memory is achieved. Unlike all previous arts, the novel combo nonvolatile memory of the present invention of ROM, EEPROM and FLASH or combination of any two is made of one unified, fully compatible, highly-scalable BN+ cell and unified process. In addition, its cell operation schemes have zero array overhead and zero disturbance during P/E operations. The novel combo nonvolatile memory is designed to meet the need in those markets requiring flexible write size in units of bytes, pages and blocks at a lower cost.

REFERENCES:
patent: 5748538 (1998-05-01), Lee et al.
patent: 5818748 (1998-10-01), Bertin et al.
patent: 5978272 (1999-11-01), Fang et al.
patent: 6072722 (2000-06-01), Hirano
patent: 6174759 (2001-01-01), Verhaar et al.
patent: 6212102 (2001-04-01), Georgakos et al.
patent: 6266274 (2001-07-01), Pockrandt et al.
patent: 6307781 (2001-10-01), Shum
patent: 6326661 (2001-12-01), Dormans et al.
patent: 6370081 (2002-04-01), Sakui et al.
patent: 6400604 (2002-06-01), Noda
patent: 6515911 (2003-02-01), Campardo et al.
patent: 6560144 (2003-05-01), Atsumi et al.
patent: 6665211 (2003-12-01), Kern
U.S. Appl. No. 09/852,247, filed May 9, 2001, Now U.S. Appl. No. 6,556,481.
“A Novel 3-Step Write Operation Nonvolatile Semiconductor One-Transistor, NOR-Type Flash EEPROMMemory Cell,” AP-01-001.
U.S. Appl. No. 09/891,782, filed Jun. 27, 2001, “A Novel 3-Step Write Operation Nonvolatile Semiconductor One-Transistor Flash EEPROM Memory,” AP 01-001.2.

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