Monitoring processor execution cycles to prevent task overrun in

Details Monitoring processor execution cycles to prevent task overrun in Monitoring processor execution cycles to prevent task overrun in

1994-07-13

2000-07-04

Homere, Jean R.

Electrical computers and digital processing systems: multicomput

Computer-to-computer data routing

Least weight routing

708100, 709101, 710 29, 710260, G06F 1300

Patent

active

060852186

ABSTRACT:
Hard, real-time, multi-tasking system is monitored by combined hardware and software and logic to detect overrun of any task beyond a declared maximum processor cycle limit for the task. Processor execution cycles utilized by DMA or interrupt processing and not related to the task being executed are not counted. Counter hardware and control logic reduces software overhead for monitoring execution cycle utilization by a task and provides capability not only of overrun detection, but programmed cycle usage alarm, consumed cycle count and overall processor loading or utilization measurements to be made.

REFERENCES:
patent: 3648253 (1972-03-01), Mullery
patent: 4432051 (1984-02-01), Bogaert
patent: 4954948 (1990-09-01), Hira
patent: 4958275 (1990-09-01), Yokouchi
patent: 5146589 (1992-09-01), Peet
patent: 5193189 (1993-03-01), Flood
patent: 5210872 (1993-05-01), Ferguson

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