Monitoring circuit for a supply voltage

Details Monitoring circuit for a supply voltage Monitoring circuit for a supply voltage

1998-04-24

2001-02-13

Lefkowitz, Edward (Department: 2736)

Communications: electrical

Condition responsive indicating system

Specific condition

C340S511000, C340S635000, C340S664000, C361S030000

Reexamination Certificate

active

06188321

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a monitoring circuit for at least one supply voltage, including a first threshold switch, which if the supply voltage drops below a predeterminable threshold value generates a first warning signal USWN, and a second threshold switch, which after a fixed warning period tw elapses generates a second warning signal TOTUSN.
Such a monitoring circuit is known (German Patent 39 10 212 C2). In this monitoring circuit, the first and second warning signals and a signal from the monitoring circuit, which responds if the supply voltage drops below a predetermined lower threshold, put switch elements in a switching state in which terminals for the warning signals are disconnected from the pole furnishing the supply voltage at a high voltage level and are connected to the other pole that furnishes the low supply voltage. This assures that the first and second warning signals have the requisite level for reliable detection even if the supply voltage, for a relatively long period of time, is at a level which while somewhat high is still not adequate for operating a data processor.
OBJECT OF THE INVENTION
The object of the invention is to furnish a monitoring circuit for a supply voltage with which the warning signal and the alarm signal can be generated bounce free and secure against zero voltage in the event of a malfunction and can be reset again upon resumption of voltage, all at little effort and expense. An embodiment of the circuit with SMD components should also be possible.
In a monitoring circuit of the type described at the outset, this object is attained according to the invention in that the threshold switches each have an internal counting circuit for determining time periods tv
1
, tv
2
, after which the first and second warning signals (USWN, TOTUSN) generated are reset again. Because the warning signals are kept at a defined binary value, such as “LOW”, for a defined period the signal that generates the warning signals is debounced. The threshold switches used, because of their internal counting circuit, require no external circuitry for determining the delay times tv
1
, tv
2
, and as a result on the one hand fewer components are needed and on the other an embodiment with SMD technology is made possible.
In a preferred embodiment, the monitoring circuit, for monitoring an auxiliary voltage, has a third threshold switch, which if the auxiliary voltage drops below a predeterminable threshold value sets the first and second warning signals USWN and TOTUSN to the binary value “LOW”. This provision assures zero-voltage security. The term “secure against zero voltage” means that the signals remain at a safe level, such as zero volts, regardless of the other levels present in the monitoring circuit, and for example even in the event of low voltage.
It can be noted as a particular advantage of the monitoring circuit that the threshold switches are all of the same construction and are preferably of the type known as MAX809. As a result, an especially simple, economical circuit design using SMD technology can be achieved. The threshold value levels can be set to different values.
It is provided that the first threshold switch is followed by a capacitor which is discharged as a reaction to the first warning signal USWN and is recharged as a reaction to the second warning signal TOTUSN. On the one hand, the capacitor is connected by its positive terminal, via a resistor and a transistor, to a positive pole of the supply voltage or auxiliary voltage, and on the other hand by its negative terminal to a negative pole of the supply voltage or auxiliary voltage; the base of the transistor is connected, via a resistor and a driver member, to the output of the first threshold switch, and via a further resistor and a driver member to the output of the second threshold switch. As a result of this circuitry provision it is attained that the capacitor is recharged immediately after the tripping of the second warning signal TOTUSN, so that even voltage dips occurring in rapid chronological succession can be detected.
A resistor is connected parallel to the capacitor, for discharging it. The warning period tw can be adjusted via the value of the parallel-connected resistor.
In a further preferred embodiment it is provided that the capacitor is connected by its positive terminal, via a resistor and a diode, to a driver component, whose output is controllable as a function of the voltage of a primary capacitor. With long warning times tw, it is not suitable to design the storage capacitor for the input voltage (primary capacitor) for maximum tolerance in terms of the warning time tw. By means of the proposed circuits, it is now possible to discharge the capacitor early, as a function of the voltage at the primary capacitor. This shortens the warning time tw.
It is also provided that the voltage of the primary capacitor is delivered to the base of an optocoupler, whose collector is connected to the positive pole of the supply voltage or auxiliary voltage and whose emitter is connected to the center tap of a voltage divider located between the positive and negative poles of the supply voltage or auxiliary voltage, and one input of the driver component is also connected to the center tap of the voltage divider. The first threshold switch is also triggerable via an optotransistor. By means of the optotransistors, a galvanic decoupling is assured.
Further details, advantages and characteristics of the invention will become apparent not only from the claims and the characteristics recited in them—taken independently and/or in combination—but also from the ensuing description of a preferred exemplary embodiment shown in the drawings.


REFERENCES:
patent: 3852732 (1974-12-01), Yorksie et al.
patent: 4234920 (1980-11-01), Van Ness et al.
patent: 4262283 (1981-04-01), Chamberlain et al.
patent: 4605922 (1986-08-01), Blattman et al.
patent: 4833450 (1989-05-01), Buccola et al.
patent: 5304986 (1994-04-01), Motegi
patent: 3910212 (1990-10-01), None
patent: 19532677 (1997-06-01), None
patent: 0623868 (1994-11-01), None

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