Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Encapsulating
Reexamination Certificate
2003-12-22
2004-11-23
Thai, Luan (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Encapsulating
C438S112000, C438S124000, C438S125000
Reexamination Certificate
active
06821823
ABSTRACT:
BACKGROUND
1. Field
This invention relates generally to packaging of integrated circuits. More specifically, this invention relates to a stiffener for a package substrate.
2. Backgrounds and Related Art
In recent years, substrates have become increasingly fragile. In particular, thin core and coreless substrates have emerged. Such substrates improve the electrical performance of a package by reducing the lengths and distances of circuit paths and electrical connections. Substrates are typically handled during the assembly and test manufacturing process and when changes, such as chip upgrades, are made to existing systems. To enable a package to survive such handling, as well as other stresses in the use environment of the package, stiffeners often are attached to substrates.
FIG. 1 (Prior Art) illustrates a portion of an electronic package 100. Package 100 includes a package substrate 130, pins 140 attached to substrate 130, land side capacitor (LSC) 120, a die 110, and metal stiffeners 101. Each metal stiffener 101 typically comprises a metal piece, such as a rectangular or circular frame, that is glued to substrate 130. Metals such as copper may be employed for stiffeners 101. Each metal stiffener 101 has a cutout in the middle thereof to enable die 110 to pass through the frame of each metal stiffener 101.
Substrate 130 may comprise a thin core or coreless substrate. Substrate 130 may be handled by grasping metal stiffener 101 and without grasping substrate 130. Accordingly, metal stiffeners 101 provide mechanical stability to substrate 130 by reducing the forces applied to substrate 130 during handling of substrate 130.
Power delivery requirements of integrated circuits are becoming increasingly demanding. For instance, in packages that include central processing unit (CPU) elements, large amounts of electrical energy are needed to initially power a CPU that has been idle. The required change in current per unit time (di/dt) associated with ramping of the current may be very high. As such, increased amounts of capacitance are typically included in a package to store energy for the ramping. Yet, a typical package has a limited amount of space in which to house capacitive elements. Such limited space may constrain power delivery performance of the package.
Therefore, what is needed is a stiffener that provides enhanced benefits to a package substrate.
REFERENCES:
patent: 6091194 (2000-07-01), Swirbel et al.
patent: 6257215 (2001-07-01), Kaminaga et al.
patent: 6346743 (2002-02-01), Figueroa et al.
patent: 6512182 (2003-01-01), Takeuchi et al.
patent: 2002/0033378 (2002-03-01), Hayashi et al.
Mallik Debendra
Xie Hong
Intel Corporation
Pillsbury & Winthrop LLP
Thai Luan
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