Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Patent
1998-09-10
2000-07-04
Niebling, John F.
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
438106, 438121, 438124, 438125, 438126, 438127, 438613, H01L 2144, H01L 2148, H01L 2150
Patent
active
060837764
ABSTRACT:
A ball grid array (BGA) package configuration for packaging an integrated-circuit die includes a lead frame having a plurality of inwardly-extending bonding fingers and a centrally-located die-attach pad. The bonding fingers are disposed peripherally surrounding the die-attach pad. An integrated-circuit die is mounted on the die-attach pad. Bonding fingers are interconnected between the bonding pads on the integrated-circuit die and the plurality of bonding fingers. A plastic material is molded over the top of the lead frame and the die while still providing an exposed bottom surface of the bonding fingers on the lead frame. A solder mask is disposed over the bottom of the lead frame so as to form selective solder areas. Solder balls are attached to the selective solder areas.
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"High-Pincount PBGAs Implementation" by Bruce Freyman and Michael Petrucci, Advanced Packaging Magazine, May/Jun. 1995.
"High Performance Package" Product Announcement by Olin Interconnect Technologies, Manteca, California, pp. 146-152.
BGA Technology: Current and Future Direction For Plastic, Ceramic and Tape BGAs by David Walshak and Hassan Hashemi, MCC, Austin Texas, pp. 157-160.
"Ball Grid Array Packaging" by M.S. Cole and T. Caulfield, IBM Microelectronics, Hopewell Junction, NY, pp. 147-152.
King Patrick T.
Niebling John F.
Philips Electronics North America Corporation
Zarneke David
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