Molded laminate package with integral mold gate

Details Molded laminate package with integral mold gate Molded laminate package with integral mold gate

1997-09-26

1999-03-23

Arroyo, Teresa M.

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With dam or vent for encapsulant

257730, 257787, H01L 23495, H01L 2304, H01L 2328

Patent

active

058863982

ABSTRACT:
According to the present invention, a semiconductor package is provided. In one version of the invention, the semiconductor package includes a laminated substrate having a semiconductor die mounted on its upper surface, electrical connections between bond pads on the semiconductor die and conductive traces on the substrate, as well as electrical connections between the conductive traces and electrical contacts on the lower surface of the substrate. The semiconductor package also includes a molded covering on the upper surface of the substrate which covers the semiconductor die and the electrical connections. The molded covering has a mold body portion and a mold gate runner which extends from the mold body portion to an edge of the substrate. The mold gate runner is provided with a surface that is substantially even with the edge of the substrate and rises perpendicularly from the upper surface of the substrate.

REFERENCES:
patent: 4706105 (1987-11-01), Masuda et al.
patent: 5304841 (1994-04-01), Negro
patent: 5371044 (1994-12-01), Yoshida et al.
patent: 5517056 (1996-05-01), Bigler et al.
patent: 5708300 (1998-01-01), Woosley et al.
patent: 5780933 (1998-07-01), Ohmori et al.
patent: 5984327 (1997-11-01), Nakazawa et al.

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