Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2011-06-07
2011-06-07
Thomas, Tom (Department: 2893)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257SE23141, C257S784000
Reexamination Certificate
active
07956471
ABSTRACT:
A mold (10) including a first mold part (12) and a second mold part (14) define a mold cavity (16) therebetween. A gate (18) is formed in at least one of the first and second mold parts (12) and (14) such that the gate (18) communicates with the mold cavity (16). A vent (20) having a constricted portion (22) is arranged to communicate with the mold cavity (16). A substrate (28) including a base substrate (30) and an electrically conductive pattern (32) and (34) formed on the base substrate (30) may be received in the mold (10). A solder resist layer (36) is formed on the base substrate (30) and a portion of the electrically conductive pattern (32). A plurality of grooves (38) and (40) is formed in a staggered arrangement around a periphery of a molding area (42) on the substrate (28).
REFERENCES:
patent: 6246115 (2001-06-01), Tang et al.
patent: 7141886 (2006-11-01), Dimaano, Jr. et al.
patent: 2005/0017354 (2005-01-01), Paul et al.
patent: 2009/0045529 (2009-02-01), Kazama
patent: 2004228123 (2004-08-01), None
Eu Poh Leng
Low Boon Yew
Wong Wai Keong
Bergere Charles
Freescale Semiconductor Inc.
Thomas Tom
Trinh Hoa B
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