Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Patent
1996-05-06
1997-07-29
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
257605, 257641, 257649, 257665, 257913, H01L 2900
Patent
active
056524595
ABSTRACT:
An improved structure and method for forming an integrated circuit guard ring which prevents contamination/moisture from diffusing through a fuse opening, in the insulating layer(s), to device areas, is described. A first insulating layer is formed over portions of the substrate. A gate insulating layer is formed surrounding the first insulating layer. The first ring surrounds a fuse area--including the area where the fuse will be cut by a laser or burned by a current. A first dielectric layer is formed over the substrate surface. A first passivation layer is then formed over the first insulating layer. A first opening is formed through the first passivation layer and first dielectric layer over the first ring. A fuse is formed over the first passivation layer over the fuse area and a second ring of water impervious material is formed on the first ring through the first opening. The first and second rings form a moisture impervious seal. A second insulating layer is then formed over the fuse and the first insulating layer. A fuse opening is etched over at least the fuse area through the second insulating layer and can expose the fuse. A second passivation layer is formed over the second insulating layer and the fuse.
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patent: 5444012 (1995-08-01), Yoshizumi et al.
patent: 5528372 (1996-06-01), Kawashima
Carroll J.
Saile George O.
Stoffel William J.
Vanguard International Semiconductor Corporation
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