Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-11-09
2002-09-10
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S108000
Reexamination Certificate
active
06448106
ABSTRACT:
FIELD OF THE INVENTION
Embodiments of the invention relate to device modules and methods for making device modules.
BACKGROUND OF THE INVENTION
A computer such as a server or supercomputer normally includes a number of devices such as integrated circuit chips. The way that such devices are packaged can determine how efficiently the computer can operate. For example, device packages can be designed to introduce signals and power to the devices, remove heat from the devices, physically support the devices, and protect the devices from the environment. Electronic packages also redistribute the dense input/output (I/O) connections on the devices to the I/O connections on a higher level interconnect structure such as a circuit board.
One type of device package is a pin grid array package. A typical pin grid array package includes a device module. In a typical conventional device module, one or more devices are attached to a ceramic circuit structure. Solder joints can be used to couple the devices to the ceramic circuit structure. Pins attached to the ceramic circuit structure permit the package to be physically coupled and uncoupled to and from the circuit board. For instance, the package can be physically coupled or uncoupled to and from the circuit board by inserting or withdrawing the pins from the circuit board apertures, thus permitting relatively easy replacement of the package if desired.
Although pin grid array packages are desirable, conventional pin grid array package modules and the methods for forming the modules could be improved. For example, the thermal mismatch between a device and a ceramic circuit structure in a package can sometimes cause solder joints disposed between the device and the ceramic circuit structure to fail. The repeated on-off cycling of the device during its lifetime causes it to repeatedly expand and contract relative to the ceramic circuit structure. This can sometimes cause solder joints between the device and ceramic circuit structure to break over time. Moreover, ceramic circuit structures are relatively difficult and expensive to make.
Accordingly, it would be desirable to provide for improved device modules, which are less expensive and less difficult to make.
SUMMARY OF THE INVENTION
Embodiments of the invention are directed to device modules and methods for making device modules suitable for use in a pin grid array package.
One embodiment of the invention is directed to a method comprising: forming a polymeric circuit structure having a first side and a second side on a substrate, wherein the first side is adjacent to the substrate; bonding a pin to the second side of the polymeric circuit structure; removing at least a portion of the substrate to expose at least a portion of the first side of the polymeric circuit structure; and mounting a device on the first side of the polymeric circuit structure.
Another embodiment of the invention is directed to a method comprising: forming a polymeric circuit structure having a first side and a second side on a substrate, wherein the polymeric circuit structure includes a first conductive region at the first side and a second conductive region at the second side, and the first side is adjacent to the substrate; aligning an aperture in a rigid body with the second conductive region; removing at least a portion of the substrate to expose at least a portion of the first side of the polymeric circuit structure; depositing a conductive material within the aperture to form a conductive via structure, the conductive via structure having a first end proximate to the second conductive region and a second end distal to the second conductive region; and bonding a pin to the second end of the conductive via structure.
Another embodiment of the invention is directed to a device module comprising: a polymeric circuit structure having a first side comprising a first conductive region and a second side having a second conductive region; a device on the first conductive region; a pin bonded to the second conductive region, and disposed opposite the device on the first conductive region; and a rigid board having an aperture, wherein the pin passes through the aperture and opposite ends of the pin are disposed outside of the aperture.
These and other embodiments are described with reference to the foregoing Figures and Detailed Description.
REFERENCES:
patent: 4231154 (1980-11-01), Gazdik et al.
patent: 4418857 (1983-12-01), Ainslie et al.
patent: 4514752 (1985-04-01), Engel et al.
patent: 4517021 (1985-05-01), Gazdik et al.
patent: 4616406 (1986-10-01), Brown
patent: 4618739 (1986-10-01), Theobald
patent: 4742024 (1988-05-01), Sugimoto et al.
patent: 4791075 (1988-12-01), Lin
patent: 4812191 (1989-03-01), Ho et al.
patent: 4861944 (1989-08-01), Jones, II et al.
patent: 4874721 (1989-10-01), Kimura et al.
patent: 4924033 (1990-05-01), Iyogi et al.
patent: 4965227 (1990-10-01), Chang et al.
patent: 4970577 (1990-11-01), Ogihara et al.
patent: 4970781 (1990-11-01), Chang et al.
patent: 5008770 (1991-04-01), Hilland
patent: 5098864 (1992-03-01), Mahulikar
patent: 5102829 (1992-04-01), Cohn
patent: 5126818 (1992-06-01), Takami et al.
patent: 5268065 (1993-12-01), Grupen-Shemansky
patent: 5337219 (1994-08-01), Carr et al.
patent: 5362985 (1994-11-01), Ma et al.
patent: 5447871 (1995-09-01), Goldstein
patent: 5468995 (1995-11-01), Higgins, III
patent: 5485039 (1996-01-01), Fujita et al.
patent: 5534094 (1996-07-01), Arjavalingam et al.
patent: 5574311 (1996-11-01), Matsuda
patent: 5614277 (1997-03-01), Beilstein, Jr. et al.
patent: 5627405 (1997-05-01), Chillara
patent: 5653019 (1997-08-01), Bernhardt et al.
patent: 5715595 (1998-02-01), Kman et al.
patent: 5726493 (1998-03-01), Yamashita et al.
patent: 5734555 (1998-03-01), McMahon
patent: 5743009 (1998-04-01), Matsui et al.
patent: 5777852 (1998-07-01), Bell
patent: 5786239 (1998-07-01), Ohsawa et al.
patent: 5786628 (1998-07-01), Beilstein, Jr. et al.
patent: 5786630 (1998-07-01), Bhansali et al.
patent: 5796164 (1998-08-01), McGraw et al.
patent: 5818697 (1998-10-01), Armezzani et al.
patent: 5821626 (1998-10-01), Ouchi et al.
patent: 5840593 (1998-11-01), Leedy
patent: 5841190 (1998-11-01), Noda et al.
patent: 5900312 (1999-05-01), Sylvetser
patent: 5919329 (1999-07-01), Banks et al.
patent: 6125529 (2000-10-01), Rosen et al.
An Introduction to Plastic Pin Grid Array (PPGA) Packaging,Intel AP-577 Application Note(Jun. 1997), 26 pps.*
Tummala,Microelectronics Packaging Handbook: “Pinned Packages” (pps. 782-803); “Consumer Product through Mid-Range Computer Packaging” (pps. 1082-1085) (1989).
Massingill Thomas J.
Takahashi Yasuhito
Wang Wen-chou Vincent
Zhang Lei
Coudert Brothers LLP
Fujitsu Limited
Geyer Scott
Sherry Michael
LandOfFree
Modules with pins and methods for making modules with pins does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Modules with pins and methods for making modules with pins, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Modules with pins and methods for making modules with pins will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2827482