Module interface with optical and electrical interconnects

Details Module interface with optical and electrical interconnects Module interface with optical and electrical interconnects

2002-12-31

2004-09-21

Frech, Karl D. (Department: 2876)

Optical waveguides

With disengagable mechanical connector

Optical fiber to a nonfiber optical device connector

C385S024000

Reexamination Certificate

active

06793408

ABSTRACT:

FIELD
This invention relates generally to optical interconnect systems, and more specifically to a system in which multiple memory modules have electrical power and low-speed data transmitted via e.g. copper wire, and high-speed data transmitted via an optical bus in which the connectors have mirrors or pellicles and the memory modules communicate on the optical bus.
DESCRIPTION OF RELATED ART
Optical data transmission systems have, to date, been point-to-point. Multiple optical agents can be connected in series using repeaters or transceivers between each successive pair of adjacent point-to-point optical links.
Electrical busses have limitations on the number of agents, which can be connected to them, before the busses collapse due to diminished signal integrity.
Presently, a memory bus is generally capable of supporting only a limited number of memory modules due to deterioration in signal integrity. For example, a computer may be limited to four dual inline memory modules (DIMMs) if the signals are not retransmitted. Very large memory systems use electrical repeater hubs that fan out the electrical signaling. Increasing the size of the memory system generally requires the addition of more repeater hubs.
FIG. 1
illustrates a conventional DIMM
10
which includes a substrate
11
, such as a circuit board, upon which are several memory chips
12
(on one or both sides of the substrate), one or more support chips
13
, and one or more passive components
14
,
15
such as resistors, capacitors, and the like. The connector edge of the substrate includes a number of electrical contacts
16
,
17
,
18
typically formed as copper plating connected to traces (not shown) that lead to the various chips and components. The contacts include a first set of contacts
16
for carrying high-speed data such as the actual data bits being written to or read from the memory chips, address bits, clocking and timing bits, and so forth. The contacts also include a second set of contacts
17
for carrying low-speed data such as control or configuration information, such as that which may be stored in an E-Prom or non-volatile memory. For example, an E-Prom may contain the DIMM configuration data, memory type and speed and memory size. The contacts also include a third set of contacts
18
for providing ground and power voltages to the DIMM. The substrate may include a cutout or keyway
19
which helps ensure that the DIMM is installed in a correct orientation.
FIG. 2
illustrates a conventional large memory system
20
, including a microprocessor
21
, a memory controller
22
, and a number of DIMMs
10
. A first set of the DIMMs is connected to a first memory bus
24
. A repeater hub
25
is connected to the first memory bus and provides fanout to a second memory bus
26
, to which is connected a second set of DIMMs and another repeater hub, and so forth. Each respective memory bus is limited in the number of DIMMs that are connected to it, such that electrical signal integrity does not collapse. The repeater hubs provide fanout to additional memory busses, to increase the total number of DIMMs beyond that which a single memory bus could support.


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