Module having test architecture for facilitating the testing...

Details Module having test architecture for facilitating the testing... Module having test architecture for facilitating the testing...

2004-03-09

2004-12-28

Zarneke, David (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S763010

Reexamination Certificate

active

06836138

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the testing of memory devices. More particularly, the present invention relates to a module that facilitates the testing of functional characteristics of ball grid array (referred to as BGA, hereinafter) packages, and to a test method using the same.
2. Description of the Related Art
A memory module provides the requisite information storage capacity of a computer. The memory module has a plurality of semiconductor memory devices soldered to a module board, which in turn is installed in a socket of the computer system. Ten or several tens of the memory devices are typically mounted on a single module board to thereby form the memory module. On the other hand, each memory device comprises a semiconductor package provided with a built-in memory chip, and external connection terminals coupled to the chip. Of these semiconductor packages, BGA packages, employing balls as the external connection terminals, are being used to meet the demand for smaller memory devices having larger numbers of input/outputs.
FIG. 1
illustrates a memory module
50
formed of a plurality of BGA packages
10
mounted on a module board. As shown in
FIG. 1
, the memory module
50
comprises a module board
51
, BGA packages
10
arranged at a predetermined pitch along the module board
51
, and a wire pattern
53
disposed on the module board
51
. The wire pattern
53
may be formed on both sides of the module board
51
, in which case the respective portions of the wire pattern
53
formed on both sides of the module board
51
are electrically coupled to each other through via holes
55
. Alternatively, the wire pattern
53
may be disposed inside or on only one side of the module board
51
.
The wire pattern
53
is composed of board pads
53
a
, tabs
53
b
, and a circuit pattern
53
c
. Each board pad
53
a
is located at a position where the ball (not shown) of the BGA package
10
is situated, i.e., the pads
53
a
are arranged in correspondence with the balls of the BGA package
10
so as to be electrically connected to the BGA package
10
. The tabs
53
b
are connected to the board pads
53
a
by the circuit pattern
53
c
, and are spaced from one another at a predetermined pitch along the longer side of the module board
51
. The tabs
53
b
are insertable into a socket of an external electronic system to provide an electrical interconnection between the memory module
50
and the external electronic system.
Characteristics of each BGA package
10
are typically tested by test apparatus that checks the waveforms of signals generated by the BGA package
10
while mounted on the module board
51
. To this end, the test apparatus employs probe pins P fed through the via holes
55
from the side of the module board
51
opposite that on which the BGA package
10
is mounted. However, this type of probe-based test apparatus can obviously not be used to test a module
50
in which the BGA packages
10
are mounted on both sides of the module board
51
.
One of the conventional ways to solve the limitations posed by the probe-based apparatus in testing a module having packages mounted to both sides of the module board is to provide contacts for the probe pins at the sides of the BGA package
10
. That is, as shown in
FIG. 2
, additional test signal lines
57
extend from the board pads
53
a
on the module board
51
, and probe pads
59
for contacting the probe pins of the test apparatus are formed at the ends of the test signal lines
57
, respectively.
However, for accuracy, the actual signals generated by the BGA package
10
should be checked by the test apparatus at the external terminals of the package, i.e., at the solder balls of the BGA package
10
. In the case of the module shown in
FIG. 2
, though, the signal may be distorted as it must travel the entire length of the test signal line
57
before being picked up by the test apparatus. Moreover, this solution may result in an impedance mismatch, a reflection of the signal, and electromagnetic incompatibility (EMI) due to stubbing with the additional test signal line
57
. Still further, EMI is more likely to exist in high-frequency applications because in this case the test line inducing the stubbing disturbance acts as an antenna.
FIG. 3
illustrates another conventional module
50
in which the test points are located to the side of the BGA package
10
mounted on the module board
51
. In this module, a test pad
61
for contacting a probe pin of the test apparatus is provided on the circuit pattern
53
c
through which signals in actual use travel. However, even though the structure shown in
FIG. 3
is simple, differences still exist between the actual signals generated during a normal operating state of the memory module and the signals measured by the test apparatus at the test pads
61
.
SUMMARY OF THE INVENTION
An object of the present invention is to solve the aforementioned problems of the prior art.
Accordingly, one object of the present invention is to provide a ball grid array package test module by which reliable test results for signals appearing at balls of a BGA package can be picked up, and which prevents distortions of actual drive signals.
Another object of the present invention is to provide a method of testing ball grid array packages mounted on a module board, which yields reliable test results for signals appearing at balls of a BGA package and prevents distortions of actual drive signals.
According to one aspect of the present invention, a ball grid array package test apparatus mounted on a module board includes: ball grid array (BGA) packages, a module board to which the BGA packages are mounted, and test architecture including package test signal lines extending along the bottom surface of each of the BGA packages, board test signal lines extending along a surface of the module board, and electrical junctions connecting the package and board test signal lines.
Each of the BGA packages includes a semiconductor chip mounted on a circuit board, and a plurality of solder balls arranged in a matrix on the bottom surface of the circuit board.
The package test signal lines are each connected to a respective one of the solder balls of the BGA package, and terminate at a location disposed outwardly of the matrix of solder balls of the BGA package. The board test signal lines correspond to the package test signal lines and each extend along the module board from a first position, juxtaposed with respect to the location at which the corresponding package test signal lines terminates, to a second position located to the side of the BGA package. The test architecture also preferably includes probe pads connected to ends of the board test signal lines at the second positions, respectively. The distance between each probe pad and solder ball, which are connected through a package test signal line and a board test signal line, is preferably 5-10 mm.
The electrical junctions each include a package test pad connected to a package test signal line, a board test pad connected to a board test signal line, and a junction node interposed between the package test pad and the board test pad. The junction node is formed in the shape of a ball, and may be formed on either one of the package test pad and the board test pad. Also, the package test pads are disposed in conformity with the matrix of the solder balls, so as to have a spacing with the solder balls at a pitch corresponding to that of the solder balls.
According to another aspect of the present invention, a method of testing BGA packages comprises pre-forming package test signal lines on each of at least one BGA packages, providing a module board having the board test signal lines and probe pads on a surface of the board substrate thereof, mounting each BGA package to the module board while electrically connecting the test signal lines on the bottom surface of the BGA package to the board test signal lines, respectively, and subsequently inputting signals to the semiconductor chip of the B

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