Module, electronic device and evaluation tool

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C710S048000

Reexamination Certificate

active

07571068

ABSTRACT:
A module (100) has test controller (140) for evaluating a functional block (120). The test controller (140) includes a first register (142) coupled between an input pin (162) and an output pin (164) from a plurality of pins (160) and a second register (144) coupled to the first register (142) for capturing an update of the content of the first register (142) responsive to an update signal from a decoder (170). The second register (144) is further arranged to generate evaluation control signals (145).The test controller further includes dedicated control circuitry including a plurality of logic gates (180) and a first logic gate (182). The plurality of logic gates is arranged to decode the content of the first register (142) and provide the first logic gate (182) with a resulting gating signal for blocking the update of the second register (144). Consequently, the dedicated control circuitry is able to prevent undesired changes in the module (100) during an evaluation mode of for instance another module.

REFERENCES:
patent: 4000464 (1976-12-01), Nussel
patent: 4928278 (1990-05-01), Otsuji et al.
patent: 5396501 (1995-03-01), Sengoku
patent: 5983379 (1999-11-01), Warren
patent: 6055649 (2000-04-01), Deao et al.
patent: 6178534 (2001-01-01), Day et al.
patent: 6499124 (2002-12-01), Jacobson
patent: 6553527 (2003-04-01), Shephard, III
patent: 6728901 (2004-04-01), Rajski et al.
patent: 6851079 (2005-02-01), Hergott
patent: 6941494 (2005-09-01), Andreev et al.
patent: 6961871 (2005-11-01), Danialy et al.
patent: 6988230 (2006-01-01), Vermeulen et al.
patent: 7107503 (2006-09-01), Balzer
patent: 7120843 (2006-10-01), Whetsel
de Jong et al., Testing and Programming Flash Memories on Assemblies During High Volume Production, Oct. 30-Nov. 1, 2001, ITC International Test Conference, pp. 470-479.
Zhu et al., The Algorithm of Inserting Boundary-Scan Circuit Automatically, 1998 IEEE, pp. 527-531.
Oakland, S., Combining IEEE Standard 1149.1 With Reduced-Pin-Count Component Test, 1991 IEEE VLSI Test Symposium, pp. 78-84.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Module, electronic device and evaluation tool does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Module, electronic device and evaluation tool, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Module, electronic device and evaluation tool will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4105603

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.