Modulator with biasing circuit to minimize output distortion

Details Modulator with biasing circuit to minimize output distortion Modulator with biasing circuit to minimize output distortion

1994-08-24

1996-02-20

Mis, David

Modulators

Frequency shift keying modulator or minimum shift keying...

332127, 331 17, 331 23, 331 36C, 331177V, H03C 300, H03C 309, H03B 508, H03L 708

Patent

active

054932572

ABSTRACT:
A modulator for digital modulation is described to produce a modulated output from a voltage controlled oscillator in a phase locked loop during transmission of a random modulating input. The input voltage is applied to a coupling capacitor and when transmission ceases, the state of charge on the capacitor will not change because of a biasing circuit which comprises two resistors fed by a tri-state buffer which holds the input terminal of the capacitor at the average level between logic zero and logic one when no modulation is applied.

REFERENCES:
patent: 4609886 (1986-09-01), Takaki et al.
patent: 4633197 (1986-12-01), Vanderspool, II

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