Pulse or digital communications – Transmitters
Reexamination Certificate
1998-10-30
2002-03-19
Bocure, Tesfaldet (Department: 2731)
Pulse or digital communications
Transmitters
Reexamination Certificate
active
06359936
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to modulators, and more specifically, to an improved modulator that employs a memory reduction circuit.
2. Background Art
Wireless telephones (also referred to commonly as cordless telephones) have become more and more prevalent in homes and offices. Wireless telephones offer convenience and flexibility over telephones with cords by un-tethering the user from the telephone and allowing the user to move about without worrying about the length of the cord and other restrictions imposed by the cord. The basic components of a typical wireless telephone are (1) a base that connects to a telephone jack, which provides a connection with a central office, and (2) a handset that is portable and that can be remote from the base. Voice data is communicated between the base and the handset.
There are two important considerations in the design and implementation of cordless telephones. First, it is important that the components employed by both the base and handset are such that the resulting system provides a good quality and accuracy in the voice data communicated between the base and the handset. Second, it is important to fulfill the first goal while reducing the costs of these components, if possible.
A transmitter is an important component that is needed by both the base and the handset for facilitating the transmission of voice data between the base and handset. An important component in the transmitter is a modulator which modulates voice data into a modulated signal that is suitable for transmission. Conventional modulators have been complex, difficult to implement, and expensive. Since the modulator is employed twice in every cordless phone system (i.e., implemented at the base and also in the handset), any costs savings and simplification in the design of the modulator circuit are multiplied by a factor of two.
Conventional cordless telephones employ transmitters that use a quadrature modulator, which is well known in the art. Examples include U.S. Pat. No. 5,022,054 (Wang), which describes a “Digital GMSK Modulator with Non-integer Bit Interval Handling”, and U.S. Pat. No. 5,121,412 (Borth), describes an “All-Digital Quadrature Modulator”.
FIG. 1
illustrates the general functional blocks of a conventional modulator. More specifically,
FIG. 1
is a block diagram illustrating a conventional quadrature modulator
2
. Quadrature modulator
2
includes logic
6
for receiving a dock signal
8
, and data
7
to be transmitted. Logic
6
provides address signals to a first channel and a second channel. The first channel includes a first read only memory (ROM)
3
A, a first digital to analog converter (DAC)
4
A, a first low pass filter (LPF)
5
A, and a first mixer
9
A that are coupled in series. The second channel, which is parallel to the first channel, includes a second ROM
3
B, a second DAC
4
B, a second LPF
5
B, and a second mixer
9
B coupled in series. The first channel is designated as the I-channel, and the second channel is designated as the Q-channel. The outputs of the mixers
9
A,
9
B are summed to generate an modulated signal s(t). It is noted that two channels are employed to increase the accuracy and quality of the voice data to be transmitted.
However, such a conventional modulator suffers from the following disadvantages. First, the use of two channels duplicates several circuit elements (e.g., two ROMs
3
A,
3
B, two DACs
4
a,
4
B, two LPFs
5
A,
5
B, two mixers
9
A
9
B) thereby increasing the cost of the modulator and the overall cost to implement the transmitters. Moreover, since the ROMs
3
A,
3
B are used to implement the digital waveform s(t), the ROMs
3
A,
3
B include the look-up tables for the sine and cosine carrier signals, the sine and cosine phase data signals, multipliers and adders, thereby making the size of the ROMs
3
A,
3
B undesirably large. Since ROMs
3
A,
3
B are typically implemented as embedded ROMs, space considerations are even more important. Furthermore, such a conventional modulator employs complex digital to analog converters that are also costly to manufacture and implement.
Based on the foregoing, there remains a need for an improved modulator that overcomes the disadvantages discussed previously.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an improved digital modulator that employs a single channel.
It is a further object of the present invention to provide an improved digital modulator that exploits symmetry of frequency variation trajectories that correspond to the transmitting patterns to reduce the size of the memory employed.
It is another object of the present invention to provide an improved digital modulator that employs a memory reduction circuit for reducing the size of components used to implement the modulator.
It is a further object of the present invention to provide a modulator having a memory with a reduced size as compared to the size of memories employed in conventional modulators. In the present invention, both the size of the memory and the width of the memory are reduced. The reduced memory size and width leads to cost and space savings.
It is another object of the present invention to provide a modulator having fewer shaping filter output levels that make possible a digital to analog converter (DAC) with fewer bits and correspondingly fewer levels as compared to DACs employed in conventional modulators. A DAC with fewer bits and levels is more cost effective and easier to implement than a DAC with greater bits and levels.
In order to accomplish the objects of the present invention, a modulator is provided with a digital pulse shaping filter that performs a convolution operation between input data symbols and a pulse shaping function g(t). The pulse shaping filter includes a counter, a shift register, and a memory that stores encoded non-duplicative values of a pulse shaping response. The memory has an input for receiving address signals. The counter provides a first set of address signals to the memory, and the shift register provides an output. A memory reduction circuit is coupled to the shift register to receive an input data symbol and, based on the input data symbol, provides a second set of address signals to the memory. The memory reduction circuit also selectively provides either the output of the memory or a modified output of the memory. A digital to analog converter (DAC) is coupled to the memory reduction circuit for converting the output of the memory reduction circuit to a corresponding analog value. A filter is coupled to the DAC to filter the output of the DAC and provide the signal b(t). The resulting signal b(t) is employed by a voltage controlled oscillator (VCO) to generate a modulated signal suitable for transmission.
REFERENCES:
patent: 4339724 (1982-07-01), Feher
patent: 4617535 (1986-10-01), Unerdem
patent: 4672634 (1987-06-01), Chung et al.
patent: 5022054 (1991-06-01), Wang
patent: 5121412 (1992-06-01), Borth
patent: 5148448 (1992-09-01), Karam et al.
patent: 5285479 (1994-02-01), Iwane
patent: 5802104 (1998-09-01), Thomas
patent: 5881109 (1999-03-01), Kim et al.
patent: 6239666 (2001-05-01), Omori
Dr. Feher Associates Patented Filter, Digital Signal Processing, and Correlated Modulation/RF Amplification Mears: GMSK, GFSK, FBPSK and FQPSK Implementations of Digcom, Inc. Licensed Technologies.
Bocure Tesfaldet
Sun Raymond
Winbond Electronics Corp.
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