Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2000-06-13
2002-07-16
Sherry, Michael J. (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S757020, C324S761010, C324S755090
Reexamination Certificate
active
06420887
ABSTRACT:
FIELD OF INVENTION
The present invention relates to the field of buckling beam probe apparatus. More specifically, the present invention relates to space transformers for buckling beam probe apparatus.
BACKGROUND OF INVENTION
Chips are becoming more and more compact and perform an increasing number of logical operations at higher and higher clocking frequencies. For testing purposes, chips typically provide a two dimensional array of contacting pads, which can be accessed, e.g. by buckling beam probe apparatus as it is well-known to those skilled in the art. High performance chips have a larger number of contacting pads with smaller size and smaller pitch. Due to the high contact densities on the chip top surface pad arrays are being more and more frequently replaced by ball grid arrays.
Buckling beam probe apparatus are typically utilized to test high performance chips. Their design concept is mainly based on a number of buckling beam probes that are held in a parallel fashion such that they can provide uniform access to contact pad arrays and/or ball grid arrays. To provide uniform contacting characteristics, e.g. equal contact force, scrub length etc., it is crucial that the buckling beams have identical configurations and are embedded and accessed within the probe apparatus under uniform conditions. Hence, the access side of the buckling beam matrix has an essentially identical geometric configuration to the contacting side. At the access side a space transformer provides electrical contact with each individual buckling beam. Consequently, the space transformer has to provide the same density of contacts for the buckling beams as it is dictated by the pads on the chip to be tested.
Unfortunately, the contact between the buckling beams and the space transformer is under higher cyclic strain than the contacts of the chip. The contact pads or contacting balls on the chip are only exposed to the loads and abrasion during the testing sequence once. Then the die chips are cut and packaged. The contact pads of the space transformer are exposed to repeated loading during each test cycle and subjected to increased wear.
Due to increased voltages and currents applied to the chip during the test, the contacts of the space transformer additionally have to endure higher electrical strains than the chip contacts during their regular use.
The discrepancies between the mechanical and electrical strain of space transformer contacts and chip contacts become more pronounced, the more the geometrical configuration of the contact pads or contact balls of the chips are pushed to the limits defined by the regular use of the chip.
The functional testing of the chips on the wafer level becomes an increasingly critical step in the fabrication process of high performance chips. The complexity of the logical operations that need to be tested make the testing sequence more time consuming. In addition, the chips have to be tested under elevated temperatures, which introduces a time consuming step in the chip fabrication. Therefore, it becomes desirable to test more and more chips simultaneously on the wafer level.
The space transformer not only provides contact with the buckling beams but also has to provide a conductive path between the tightly arrayed buckling beams and peripheral contact pads where relatively bulky cables are attached. For high speed testing at high clocking frequencies, where the parasitic inductive and capacitate limitations of the conductive path become relevant, the space transformer also provides intermediate logical circuitry. This intermediate logical circuitry works to up/down convert testing signal frequencies from low transmission frequencies to high testing frequencies. The low transmission frequencies are typically at levels where the inductance and capacitance in the transmission path is irrelevant.
The frequency converting circuitry is ideally placed within the space transformer in close proximity to the buckling beams to reduce the inductive path to the chip as much as possible. Frequency down converting of electric signals may be accomplished by dividing them and assigning them to a higher number of conductive paths. In summary, the space transformer provides a spatial expansion of a constant and/or increasing number of conductive paths in direction from the tightly arrayed buckling beams to the large peripheral contacts.
A number of space transformer systems have been developed to keep up with the ever increasing demands as described above. Specifically, more intermediate structures fabricated with independent technologies are being combined to bridge the scale differences between the central buckling beam contact density and the peripheral contact density.
U.S. Pat. No. 5,132,613, for instance, describes a low inductance side mount decoupling test structure that utilizes a stacked substrate MLC space transformer. The space transformer consists of an interface substrate, a “personal” substrate and an interposer block. It is fabricated from a number of individual layers that are laminated and sintered together.
Even though the described test structure provides a good scaling ratio between the central probes and the peripheral contacts, the fabrication process is time consuming and complicated. The invention does not take into consideration specific needs for contacting the probes.
U.S. Pat. No. 5,806,181 describes “contact carriers for populating larger substrates with spring contacts”. The scaling of the central probe contacts and the peripheral contacts is provided by a number of stages that are connected to each other by wire bonding. The wire bonding introduces additional inductance and affects the performance of the probe apparatus at high frequencies. The probes themselves are also wire bonded to the space transformer.
U.S. Pat. No. 5,821,763 describes a test probe for high density integrated circuits, methods of fabrication and use thereof. A ceramic packaging substrate used to package integrated circuit chips is utilized as a space transformer. The invention provides the space transformer by utilizing a structure developed for packaging of integrated circuit chips. The probes are wire bonded to the space transformer, which is optionally connected to a second fan-out structure by an interposer. The invention is also subject to the limitations described for the above patents.
It has become common practice to utilize packaging structures of circuit chips as space transformers. Since the packaging provides a similar fanning-out of the conductive paths between the circuit chip and the printed circuit board, it is preferably utilized as a space transformer. Never the less, specifics of the packaging impose limitations in its feasibility for space transformer.
First, for testing a circuit chip different signal and voltage schemes have to be applied. This increases the number of required conductive paths. Since package systems for chips are typically mass-produced, these slight differences can be compensated only with a more than proportional effort and expense.
Second, package systems are primarily designed for a permanent connection to circuit chips rather than for a high number of contacting actions. As a result, the preferred method of contacting beam probes to space transformers adapted from packaging structures is wire bonding. Wire bonding becomes increasingly disadvantageous for conductively connecting beam probes to the space transformer at high frequencies as it is described in the above.
Third, package systems are typically designed for a single circuit chip. In a test probe apparatus that tests a number of circuit chips simultaneously space transformers based on packaging structures have limited use since different fan-out concepts for the conductive paths have to be utilized.
U.S. Pat. No. 4,038,599 discloses a high density wafer contacting and test system that utilizes a space transformer essentially made from silicon like a circuit chip. The space transformer has traces and logical circuitry to compose test signals from two orthogonal oriented trace a
George Isabelle
Jurin Jean-Michel
Kister January
Kulicke & Soffa Investment, Inc.
Lumen Intellectual Property Services Inc.
Nguyen Trung Q.
Sherry Michael J.
LandOfFree
Modulated space transformer for high density buckling beam... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Modulated space transformer for high density buckling beam..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Modulated space transformer for high density buckling beam... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2862372