Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
1998-08-27
2002-04-02
Hsu, Alpus H. (Department: 2662)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C370S370000, C370S386000
Reexamination Certificate
active
06366579
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The invention generally relates to telecommunication, data communication and switching technology, and more particularly to a new switch architecture for circuit switching.
BACKGROUND
Switching is basically a question of organizing the flow of information between subscribers in a telecommunication or data communication system such that they can communicate with each other. Accordingly, switches are fundamental components of the communication system. They allow a subscriber to connect with any other remote subscriber in the system.
According to a particular type of switching called circuit switching, the subscriber information is normally assigned to time slots and the actual switching is performed on these time slots. Hence, in this case, a switch could be defined as a structure for handling time slots such that subscriber information is switched or connected from an arbitrary input point of the switch to an arbitrary output point.
The basic building blocks of switches are generally time (T) switch stages and space (S) switch stages. By combining time switch stages and space switch stages in different ways, a variety of switch structures are obtained. Examples of such switch structures are time-space-time (TST) switches, space-time-space (STS) switches, time-space (TS) switches, TSST-switches and SSTSS-switches.
The time-space (TS) switch is of particular interest because of its many advantages. First of all, and what is very important, the TS-switch is inherently strictly non-blocking, for point-to-point connections as well as for broadcasting. For other types of switches, point-to-point blocking can be alleviated by applying the well known Clos theorem. For TST-switches as an example, the Clos theorem states that the number of internal time slots should be doubled in order to achieve non-blocking for point-to-point connections. However, when it comes to broadcasting, blocking will occur in TST-switches.
Examples of other advantages of the TS-switch structure are given below:
short delay through the switch;
simple path selection; and
simple control paths.
In addition, the speech store memories that are commonly utilized in TS-switches have become less expensive, thus making the TS-switch structure interesting also for larger switches.
However, because of the huge amount and the complexity of internal connections between speech stores, control stores and multiplexors in a TS-switch structure, the TS-switch is generally considered indivisible and non-modular. The internal components of a TS-switch have to be arranged tightly together in order to practically realize all the connections. For this reason, the TS-switch has to be provided in a single subrack. Hence, the size of the subrack sets a limit to the maximum capacity of the TS-switch, and available subracks are indeed limited in size. Conventional large TS-switches have a capacity of 128 K, although state-of-the-art TS-switches have reached up to 216 K when the technology is stretched to its limits, squeezing as many components and cable connections as possible into the same subrack. In many telecommunication applications, higher capacities, such as 256 or 512 K, are required, rendering the conventional TS-switch structure insufficient.
In addition, there is no simple way of offering capacity growth for smaller conventional TS-switches to capacities that lie within the conventional capacity range of up to 128 K. As an example, it is not an easy task to extend a conventional TS-switch installed with a capacity of 16 K to a capacity of 64 K. This makes the conventional TS-switch structure not only insufficient with regard to maximum capacity but also inflexible with regard to capacity growth.
The European patent application 0,558,291 A2 discloses a reconfigurable switch memory that is applicable to time switches and space switches such that two very different time switching functions can be efficiently implemented by one type of switching unit. The European patent application 0,558,291 A2 also discloses a reconfigurable STM switching unit which can work in either one bit or five bit mode so that the granularity of the switch can be varied. According to the European patent application, a simple way of offering growth is to use more switching units and to run these units in parallel.
The international patent application with publication number WO 95/32599 discloses a cross connect architecture for switching digital signals, in which the input stage is composed of parallel time-space (TS) switch blocks, the center stage is composed of parallel blocks formed by time and space switches (STS;TxT-S) and the output stage is composed of parallel space-time (ST) switch blocks. In order to make the architecture non-blocking, the number of blocks in the center stage is doubled relative to the minimum number of blocks. Apparently, the international patent application WO 95/32599 relates to a complex multi-stage switching architecture.
SUMMARY
The invention overcomes these and other drawbacks of the prior art.
A general object of the invention is to provide a robust and flexible switch architecture for circuit switching.
Another object of the invention is to provide a modular switch structure in which non-blocking and scalability with regard to capacity are combined.
A modular switch has advantages with regard to costs and flexibility. As an example, it is possible to start with a small switch with a single switch module or just a few modules to a relatively low cost. If the need for more capacity at a subsequent stage arises, then an appropriate number of further switch modules are easily added so as to make the overall switch bigger.
It is furthermore desirable to utilize the Time-Space (TS) switch structure, with all its advantages, as a basis for the modular switch architecture.
In particular, high capacities such as 256 K, 512 K or more should be easy to realize with this new modular TS-switch architecture.
These and other objects are solved by the invention.
The general idea according to the invention is to break out part of the space (S) switch functionality of a time-space (TS) switch core and arrange this part of the space functionality in groups of switch adapter boards, and to divide the relatively large TS-switch core into a matrix of smaller independent TS-modules that are associated with the switch adapter boards. Each group of switch adapter boards is co-operating with a predetermined row of TS-modules for input of data to the modules, and with a predetermined column of TS-modules for output of data from the modules.
By dividing the space (S) switch functionality into two parts, a first part in the TS-modules and a second part in the switch adapter boards, and interconnecting TS-modules and switch adapter boards in an appropriate way, it possible to implement the switch structure into a number of subracks with a reasonable number of interconnections between different subracks, thus obtaining a truly modular switch architecture based on TS-modules and switch adapter boards. This also makes it possible to build large TS-switch structures of 512 K or more.
The switch architecture according to the invention offers the following advantages:
strict non-blocking;
modularity (with capacities from e.g. 8 K to 512 K or more) including all the advantages of modular structures with regard to costs, flexibility and simplicity;
simple path selection; and
short delay through the switch.
Other advantages offered by the present invention will be appreciated upon reading of the below description of the embodiments of the invention.
REFERENCES:
patent: 4114143 (1978-09-01), Karnaugh
patent: 4524442 (1985-06-01), Simmons et al.
patent: 4797589 (1989-01-01), Collins
patent: 5617414 (1997-04-01), Bergkvist et al.
patent: 5784369 (1998-07-01), Romiti et al.
patent: 6088329 (2000-07-01), Lindberg et al.
patent: 0 558 291 (1993-09-01), None
patent: 92/16079 (1992-09-01), None
patent: 93/22858 (1993-11-01), None
patent: 95/32599 (1995-11-01), None
patent: 95/33354 (1995-12-01), None
Burns Doane Swecker & Mathis L.L.P.
Hsu Alpus H.
Telefonaktiebolaget LM Ericsson (publ)
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