Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2007-09-04
2007-09-04
Malzahn, D. H. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S492000
Reexamination Certificate
active
10440362
ABSTRACT:
A modular multiplication apparatus comprises a calculation unit which comprises processing units including a multiplier-adder unit and performs a modular multiplication by carrying out pipeline processes by the processing units; and a calculator configured to, before a first pipeline process, carry out a predetermined calculation for a processing result of one of the processing units in a pipeline process immediately before the first pipeline process, and when the first pipeline processes supply a calculation result of the predetermined calculation to a processing unit at an initial stage of the first pipeline process.
REFERENCES:
patent: 5361221 (1994-11-01), Fujita
patent: 6209016 (2001-03-01), Hobson et al.
patent: 6598061 (2003-07-01), Symes et al.
patent: 6804696 (2004-10-01), Chen et al.
patent: 2003/0140077 (2003-07-01), Zaboronski et al.
patent: 2005/0033790 (2005-02-01), Hubert
patent: 05-324277 (1993-12-01), None
Iwamura, K. et al., “Montgomery's Modular-Multiplication Method and Systolic-Arrays Suitable for Modular-Exponentiation”, IEICE Trans. Fundamentals (Japanese Edition), Vo. J76-A, No. 8, pp. 1214-1223, (Aug. 1993).
Kawamura, S., et al., “Cox-Rower Architecture for Fast Parallel Montgomery Multiplication”, Advances in Cryptology-Eurocrypt 2000, LNCS 1807, pp. 523-538, (2000).
Montgomery, P. L., “Modular Multiplication Without Trial Division”, Mathematics of Computation, vol. 44, No. 170, (1985).
Iwamura, K., et al., “Systolic-Arrays for Modular Exponentiation Using Montgomery Method”, Rump Session of Eurocrypt 92, LNCS, vol. 1440, pp. 477-481, Springer-Verlag, (1998).
Walter, C. D., “Montgomery's Multiplication Technique: How to Mark It Smaller and Faster”, Proceedings of CHES '99, LNCS 1717, pp. 80-93, Springer-Verlag, (1999).
Walter, C. D., “An Improved Linear Systolic Array for Fast Modular Exponentiation”, IEE Computers and Digital Techniques, vol. 147, No. 5, pp. 323-328, (Sep. 2000).
Ikeda Hanae
Kawamura Shin'ichi
Kojima Kenji
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Malzahn D. H.
LandOfFree
Modular multiplication apparatus, modular multiplication... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Modular multiplication apparatus, modular multiplication..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Modular multiplication apparatus, modular multiplication... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3798132