Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
1996-09-23
2001-01-23
Follansbee, John A. (Department: 2783)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
active
06178494
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to microprocessors, and more particularly to a modular, hybrid processor with a modularized controller and a field programmable gate array for combination with a selected microprocessor from a set of microprocessors.
BACKGROUND OF THE INVENTION
Recent improvements in performance capabilities of data processors have included increasing the clock speed or adding additional execution units.
Alternatively, field programmable gate arrays (FPGAs) have been considered for either augmenting or replacing microprocessors in order to expand the limitations posed by the arithmetic logic units. Wholesale replacement of microprocessors with FPGAs generally requires the entire recoding of operating systems. On the other hand, redesigning microprocessors to include FPGA-like architecture presents its own set of design errors.
Therefore, a need has been perceived for a quick and safe way to enhance the arithmetic performance of microprocessors and to implement algorithms within reconfigurable hardware.
SUMMARY OF THE INVENTION
In accordance with the present invention, a hybrid, modular processor package and method for developing a hybrid, modular data processing package from microprocessor and field programmable gate array (FPGA) technology combines a microprocessor, an FPGA, and a modular controller chip in order to obtain enhanced performance over that of the microprocessor. The combination of the microprocessor, FPGA, and controller chips is effected by identifying and selectively routing the non-control pins of the respective chips in parallel to the hybrid package pins and routing respective control pins of the microprocessor and FPGA through the controller pins. The controller chip emulates the behavior of the selected microprocessor bus interface and provides a set of services to the FPGA, such as configuration and memory management. By creating a standard interface to the FPGA and different microprocessor bus interfaces, a configuration code compatible family of computing devices can be created.
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Follansbee John A.
Michaelson & Wallace
Virtual Computer Corporation
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