Modular high speed counter employing edge-triggered code

Details Modular high speed counter employing edge-triggered code Modular high speed counter employing edge-triggered code

1992-03-06

1993-06-29

Sikes, William L.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Including structure for detecting or indicating overflow...

377 47, 377118, H03K 2134

Patent

active

052241335

ABSTRACT:
A high speed modular counter (100) utilizing a novel counting method in which the first bit changes with the frequency of the driving clock, and changes in the higher order bits are initiated one clock pulse after a "0" to "1" transition of the next lower order bit. This allows all carries to be known one clock period in advance of a bit change. The present counter is modular and utilizes two types of standard counter cells. A first counter cell determines the zero bit. The second counter cell determines any other higher order bit. Additional second counter cells are added to the counter to accommodate any count length without affecting speed.

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"Introduction of MOS LSI Design"; Authors: J. Mavor, M. A. Jack, P. B. Denyer; Publisher: Addison-Wesley Publishing Co.

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