Modular arithmetic coprocessor enabling the performance of non-m

Details Modular arithmetic coprocessor enabling the performance of non-m Modular arithmetic coprocessor enabling the performance of non-m

1997-02-26

1999-11-16

Mai, Tan V.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708492, G06F 738, G06F 700

Patent

active

059874899

ABSTRACT:
Disclosed is a device including three registers, one input terminal to receive pieces of binary data to be stored in these registers, a multiplication circuit enabling the performance of a multiplication operation between two pieces of data stored in two of the registers, a first addition circuit enabling the performance of an addition operation between a piece of data stored in the second register and a piece of data produced by the multiplication circuit, a subtraction circuit placed between the second register and the addition circuit, a delay cell and a second addition circuit placed between the first addition circuit and the input of the second register, multiplexing circuitry making it possible to provide the contents of the second register or a permanent logic state to one input of one of the addition circuits, to connect another input of the addition circuit to an output of the multiplication circuit and to connect an output of the addition circuit to an input of the second register.

REFERENCES:
patent: 4852037 (1989-07-01), Aoki
patent: 4945506 (1990-07-01), Baji et al
patent: 4949292 (1990-08-01), Hoshino et al
patent: 5101431 (1992-03-01), Even
patent: 5285403 (1994-02-01), Quisquater et al.
patent: 5424969 (1995-06-01), Yamada et al.
patent: 5457804 (1995-10-01), Ohtomo
patent: 5657262 (1997-08-01), Curtet

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