Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2008-10-21
2011-11-01
Lin, Sun (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S118000, C716S122000, C716S125000
Reexamination Certificate
active
08051400
ABSTRACT:
A layout for an integrated circuit includes standard cells positioned at standard cell sites. Programmable cells are positioned at programmable fill sites which have a size sufficient to accommodate the programmable cells and are not occupied by standard cells. The position of these programmable sites is recorded in site data as part of the layout data associated with the layout. Empty standard cell sites remaining after standard cells and programmable cells have been placed are filled with standard fill cells. The boundaries of the programmable cells are not constrained other than by alignment with standard cell sites. This permits a high density of programmable fill sites and programmable cells to be achieved. When it is desired to replace a programmable cell with a programmed cell the programmable cells are all deleted from the layout and then the required programmed cells are subject to an automated placement algorithm to place them where appropriate for their function. The remaining empty programmable fill sites are then refilled with programmable cells. Finally, routing algorithms to connect to and from the newly introduced programmed cells are executed to connect those program cells up to the other points within the integrated circuit layout required.
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ARM Limited
Lin Sun
Nixon & Vanderhye P.C.
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